summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorAndrew Bresticker <abrestic@chromium.org>2014-09-18 14:47:10 -0700
committerRalf Baechle <ralf@linux-mips.org>2014-11-24 07:44:52 +0100
commitf64e55dcbf84f107a68974a0734b3c31db97f169 (patch)
tree6d1d8e374e9fdd7523a0955a9bd5dec9aaa3a566
parent85f7cdacbb81db8c4cc8e474837eab1f0e4ff77b (diff)
downloadlinux-f64e55dcbf84f107a68974a0734b3c31db97f169.tar.gz
linux-f64e55dcbf84f107a68974a0734b3c31db97f169.tar.bz2
linux-f64e55dcbf84f107a68974a0734b3c31db97f169.zip
MIPS: Set vint handler when mapping CPU interrupts
When mapping an interrupt in the CPU IRQ domain, set the vint handler for that interrupt if the CPU uses vectored interrupt handling. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Reviewed-by: Qais Yousef <qais.yousef@imgtec.com> Tested-by: Qais Yousef <qais.yousef@imgtec.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Bresticker <abrestic@chromium.org> Cc: Jeffrey Deans <jeffrey.deans@imgtec.com> Cc: Markos Chandras <markos.chandras@imgtec.com> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: Jonas Gorski <jogo@openwrt.org> Cc: John Crispin <blogic@openwrt.org> Cc: David Daney <ddaney.cavm@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/7802/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/kernel/irq_cpu.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/mips/kernel/irq_cpu.c b/arch/mips/kernel/irq_cpu.c
index 531b11cbc096..590c2c980fd3 100644
--- a/arch/mips/kernel/irq_cpu.c
+++ b/arch/mips/kernel/irq_cpu.c
@@ -36,6 +36,7 @@
#include <asm/irq_cpu.h>
#include <asm/mipsregs.h>
#include <asm/mipsmtregs.h>
+#include <asm/setup.h>
static inline void unmask_mips_irq(struct irq_data *d)
{
@@ -124,6 +125,9 @@ static int mips_cpu_intc_map(struct irq_domain *d, unsigned int irq,
chip = &mips_cpu_irq_controller;
}
+ if (cpu_has_vint)
+ set_vi_handler(hw, plat_irq_dispatch);
+
irq_set_chip_and_handler(irq, chip, handle_percpu_irq);
return 0;