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| author | Dave Airlie <airlied@redhat.com> | 2016-04-06 09:40:07 +1000 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2016-04-06 09:40:07 +1000 |
| commit | 85bd5ac371c844f66918dda8c83145a26a55f9f2 (patch) | |
| tree | 28886e939945caac7215d72df9f2f5ea0d1b72fe /Documentation/DocBook | |
| parent | e7c8e54440bcae3f883ca8801f6558fe29bf0198 (diff) | |
| parent | 68d4aee9d1f271fe06e904cb99a10cf8479d3d2e (diff) | |
| download | linux-85bd5ac371c844f66918dda8c83145a26a55f9f2.tar.gz linux-85bd5ac371c844f66918dda8c83145a26a55f9f2.tar.bz2 linux-85bd5ac371c844f66918dda8c83145a26a55f9f2.zip | |
Merge tag 'drm-intel-next-2016-03-30' of git://anongit.freedesktop.org/drm-intel into drm-next
- VBT code refactor for a clean split between parsing&using of firmware
information (Jani)
- untangle the pll computation code, and splitting up the monster
i9xx_crtc_compute_clocks (Ander)
- dsi support for bxt (Jani, Shashank Sharma and others)
- color manager (i.e. de-gamma, color conversion matrix & gamma support) from
Lionel Landwerlin
- Vulkan hsw support in the command parser (Jordan Justen)
- large-scale renaming of intel_engine_cs variables/parameters to avoid the epic
ring vs. engine confusion introduced in gen8 (Tvrtko Ursulin)
- few atomic patches from Maarten&Matt, big one is two-stage wm programming on ilk-bdw
- refactor driver load and add infrastructure to inject load failures for
testing, from Imre
- various small things all over
* tag 'drm-intel-next-2016-03-30' of git://anongit.freedesktop.org/drm-intel: (179 commits)
drm/i915: Update DRIVER_DATE to 20160330
drm/i915: Call intel_dp_mst_resume() before resuming displays
drm/i915: Fix races on fbdev
drm/i915: remove unused dev_priv->render_reclock_avail
drm/i915: move sdvo mappings to vbt data
drm/i915: move edp low vswing config to vbt data
drm/i915: use a substruct in vbt data for edp
drm/i915: replace for_each_engine()
drm/i915: introduce for_each_engine_id()
drm/i915/bxt: Fix DSI HW state readout
drm/i915: Remove vblank wait from hsw_enable_ips, v2.
drm/i915: Tidy aliasing_gtt_bind_vma()
drm/i915: Split PNV version of crtc_compute_clock()
drm/i915: Split g4x_crtc_compute_clock()
drm/i915: Split i8xx_crtc_compute_clock()
drm/i915: Split CHV and VLV specific crtc_compute_clock() hooks
drm/i915: Merge ironlake_compute_clocks() and ironlake_crtc_compute_clock()
drm/i915: Move fp divisor calculation into ironlake_compute_dpll()
drm/i915: Pass crtc_state->dpll directly to ->find_dpll()
drm/i915: Simplify ironlake_crtc_compute_clock() CPU eDP case
...
Diffstat (limited to 'Documentation/DocBook')
| -rw-r--r-- | Documentation/DocBook/gpu.tmpl | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/Documentation/DocBook/gpu.tmpl b/Documentation/DocBook/gpu.tmpl index 1692c4dd5487..1464fb2f3c46 100644 --- a/Documentation/DocBook/gpu.tmpl +++ b/Documentation/DocBook/gpu.tmpl @@ -2153,7 +2153,11 @@ void intel_crt_init(struct drm_device *dev) <td valign="top" >ENUM</td> <td valign="top" >{ "Automatic", "Full", "Limited 16:235" }</td> <td valign="top" >Connector</td> - <td valign="top" >TBD</td> + <td valign="top" >When this property is set to Limited 16:235 + and CTM is set, the hardware will be programmed with the + result of the multiplication of CTM by the limited range + matrix to ensure the pixels normaly in the range 0..1.0 are + remapped to the range 16/255..235/255.</td> </tr> <tr> <td valign="top" >“audio”</td> @@ -3334,7 +3338,7 @@ int num_ioctls;</synopsis> <title>Video BIOS Table (VBT)</title> !Pdrivers/gpu/drm/i915/intel_bios.c Video BIOS Table (VBT) !Idrivers/gpu/drm/i915/intel_bios.c -!Idrivers/gpu/drm/i915/intel_bios.h +!Idrivers/gpu/drm/i915/intel_vbt_defs.h </sect2> </sect1> |