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| author | Jiri Pirko <jiri@nvidia.com> | 2024-01-03 14:28:36 +0100 |
|---|---|---|
| committer | Jakub Kicinski <kuba@kernel.org> | 2024-01-05 07:58:19 -0800 |
| commit | 8a6286c1804e2c7144aef3154a0357c4b496e10b (patch) | |
| tree | 6f7e86daa06fe9de97c1fb35703b151c56e14096 /Documentation/netlink | |
| parent | 82e7b22f647202ecd8f25de2bd3f1276bbd34989 (diff) | |
| download | linux-8a6286c1804e2c7144aef3154a0357c4b496e10b.tar.gz linux-8a6286c1804e2c7144aef3154a0357c4b496e10b.tar.bz2 linux-8a6286c1804e2c7144aef3154a0357c4b496e10b.zip | |
dpll: expose fractional frequency offset value to user
Add a new netlink attribute to expose fractional frequency offset value
for a pin. Add an op to get the value from the driver.
Signed-off-by: Jiri Pirko <jiri@nvidia.com>
Acked-by: Vadim Fedorenko <vadim.fedorenko@linux.dev>
Acked-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
Link: https://lore.kernel.org/r/20240103132838.1501801-2-jiri@resnulli.us
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'Documentation/netlink')
| -rw-r--r-- | Documentation/netlink/specs/dpll.yaml | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/Documentation/netlink/specs/dpll.yaml b/Documentation/netlink/specs/dpll.yaml index cf8abe1c0550..b14aed18065f 100644 --- a/Documentation/netlink/specs/dpll.yaml +++ b/Documentation/netlink/specs/dpll.yaml @@ -296,6 +296,16 @@ attribute-sets: - name: phase-offset type: s64 + - + name: fractional-frequency-offset + type: sint + doc: | + The FFO (Fractional Frequency Offset) between the RX and TX + symbol rate on the media associated with the pin: + (rx_frequency-tx_frequency)/rx_frequency + Value is in PPM (parts per million). + This may be implemented for example for pin of type + PIN_TYPE_SYNCE_ETH_PORT. - name: pin-parent-device subset-of: pin @@ -460,6 +470,7 @@ operations: - phase-adjust-min - phase-adjust-max - phase-adjust + - fractional-frequency-offset dump: pre: dpll-lock-dumpit |