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author | Geert Uytterhoeven <geert+renesas@glider.be> | 2018-03-29 11:02:18 +0200 |
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committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2018-04-16 13:39:47 +0200 |
commit | 6041ce57f2c8c231017a1b4f7a71b606bb1c1016 (patch) | |
tree | a4729eab64d6a0276f3a301c64e71bb3479abbc3 /Documentation/security | |
parent | 83fab8ea62ca74eaa51613ba8eeaf925f4f8087c (diff) | |
download | linux-6041ce57f2c8c231017a1b4f7a71b606bb1c1016.tar.gz linux-6041ce57f2c8c231017a1b4f7a71b606bb1c1016.tar.bz2 linux-6041ce57f2c8c231017a1b4f7a71b606bb1c1016.zip |
clk: renesas: r8a7791/r8a7793: Fix LB clock divider
The CLK_TYPE_GEN2_LB clock type is meant for SoCs like R-Car H2, where
the LB clock divider depends on the value of the MD18 pin.
On R-Car M2-W and M2-N, the LB clock divider is fixed to 24. Hence
model the clock as a fixed factor clock instead.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Diffstat (limited to 'Documentation/security')
0 files changed, 0 insertions, 0 deletions