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authorAlexander Graf <agraf@suse.de>2013-04-16 17:42:19 +0200
committerAlexander Graf <agraf@suse.de>2013-04-26 20:27:25 +0200
commitde9ba2f36368d21314860ee24893a6ffef01e548 (patch)
tree32b5a67e3c6e1b4d74f7411910acf92549cb1e4f /Documentation/virtual
parenteb1e4f43e0f47f2655372c7d32c43db9711c278e (diff)
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KVM: PPC: Support irq routing and irqfd for in-kernel MPIC
Now that all the irq routing and irqfd pieces are generic, we can expose real irqchip support to all of KVM's internal helpers. This allows us to use irqfd with the in-kernel MPIC. Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'Documentation/virtual')
-rw-r--r--Documentation/virtual/kvm/devices/mpic.txt19
1 files changed, 19 insertions, 0 deletions
diff --git a/Documentation/virtual/kvm/devices/mpic.txt b/Documentation/virtual/kvm/devices/mpic.txt
index ce98e3264fa8..ad0ac778f20a 100644
--- a/Documentation/virtual/kvm/devices/mpic.txt
+++ b/Documentation/virtual/kvm/devices/mpic.txt
@@ -35,3 +35,22 @@ Groups:
"attr" is the IRQ number. IRQ numbers for standard sources are the
byte offset of the relevant IVPR from EIVPR0, divided by 32.
+
+IRQ Routing:
+
+ The MPIC emulation supports IRQ routing. Only a single MPIC device can
+ be instantiated. Once that device has been created, it's available as
+ irqchip id 0.
+
+ This irqchip 0 has 256 interrupt pins, which expose the interrupts in
+ the main array of interrupt sources (a.k.a. "SRC" interrupts).
+
+ The numbering is the same as the MPIC device tree binding -- based on
+ the register offset from the beginning of the sources array, without
+ regard to any subdivisions in chip documentation such as "internal"
+ or "external" interrupts.
+
+ Default routes are established for these pins, with the GSI being equal
+ to the pin number.
+
+ Access to non-SRC interrupts is not implemented through IRQ routing mechanisms.