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authorLinus Torvalds <torvalds@linux-foundation.org>2015-02-12 08:58:43 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2015-02-12 08:58:43 -0800
commitcdd305454ebd181fa35b648c0921fe7df27d6f3b (patch)
tree93f2350402601465888e9f3c3e3e47d9fe598e22 /Documentation
parent42cf0f203e877cc7e502883d43b3f72149033d86 (diff)
parent3c3c8e3618b018aee1dfd42343a74f3ab5ddf23c (diff)
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Merge tag 'devicetree-for-3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull DeviceTree changes from Rob Herring: - DT unittests for I2C probing and overlays from Pantelis Antoniou - Remove DT unittest dependency on OF_DYNAMIC from Gaurav Minocha - Add Tegra compatible strings missing for newer parts from Paul Walmsley - Various vendor prefix additions * tag 'devicetree-for-3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: of: Add vendor prefix for OmniVision Technologies of: Use ovti for Omnivision of: Add vendor prefix for Truly Semiconductors Limited of: Add vendor prefix for Himax Technologies Inc. of/fdt: fix sparse warning of: unitest: Add I2C overlay unit tests. Documentation: DT: document compatible string existence requirement Documentation: DT bindings: add nvidia, tegra132-denver compatible string Documentation: DT bindings: add more Tegra chip compatible strings of: EXPORT_SYMBOL_GPL of_property_read_u64_array of: Fix brace position for struct of_device_id definition of/unittest: Remove obsolete code dt-bindings: use isil prefix for Intersil in vendor-prefixes.txt Add AD Holdings Plc. to vendor-prefixes. dt-bindings: Add Silicon Mitus vendor prefix Removes OF_UNITTEST dependency on OF_DYNAMIC config symbol pinctrl: fix up device tree bindings DT: Vendors: Add Everspin doc: add bindings document for altera fpga manager drivers: of: Export of_reserved_mem_device_{init,release}
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/arm/cpus.txt1
-rw-r--r--Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-ahb.txt5
-rw-r--r--Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt6
-rw-r--r--Documentation/devicetree/bindings/ata/tegra-sata.txt4
-rw-r--r--Documentation/devicetree/bindings/fpga/altera-socfpga-fpga-mgr.txt17
-rw-r--r--Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt10
-rw-r--r--Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt8
-rw-r--r--Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt10
-rw-r--r--Documentation/devicetree/bindings/media/atmel-isi.txt2
-rw-r--r--Documentation/devicetree/bindings/media/video-interfaces.txt2
-rw-r--r--Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt9
-rw-r--r--Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt6
-rw-r--r--Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt8
-rw-r--r--Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt3
-rw-r--r--Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-xusb-padctl.txt4
-rw-r--r--Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt7
-rw-r--r--Documentation/devicetree/bindings/rtc/nvidia,tegra20-rtc.txt4
-rw-r--r--Documentation/devicetree/bindings/serial/of-serial.txt5
-rw-r--r--Documentation/devicetree/bindings/sound/nvidia,tegra30-ahub.txt5
-rw-r--r--Documentation/devicetree/bindings/sound/nvidia,tegra30-hda.txt4
-rw-r--r--Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.txt5
-rw-r--r--Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt4
-rw-r--r--Documentation/devicetree/bindings/submitting-patches.txt23
-rw-r--r--Documentation/devicetree/bindings/thermal/tegra-soctherm.txt4
-rw-r--r--Documentation/devicetree/bindings/timer/nvidia,tegra30-timer.txt4
-rw-r--r--Documentation/devicetree/bindings/unittest.txt59
-rw-r--r--Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt5
-rw-r--r--Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt5
-rw-r--r--Documentation/devicetree/bindings/vendor-prefixes.txt9
29 files changed, 193 insertions, 45 deletions
diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
index b2aacbe16ed9..8b9e0a95de31 100644
--- a/Documentation/devicetree/bindings/arm/cpus.txt
+++ b/Documentation/devicetree/bindings/arm/cpus.txt
@@ -175,6 +175,7 @@ nodes to be present and contain the properties described below.
"marvell,pj4a"
"marvell,pj4b"
"marvell,sheeva-v5"
+ "nvidia,tegra132-denver"
"qcom,krait"
"qcom,scorpion"
- enable-method
diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-ahb.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-ahb.txt
index 234406d41c12..067c9790062f 100644
--- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-ahb.txt
+++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-ahb.txt
@@ -1,7 +1,10 @@
NVIDIA Tegra AHB
Required properties:
-- compatible : "nvidia,tegra20-ahb" or "nvidia,tegra30-ahb"
+- compatible : For Tegra20, must contain "nvidia,tegra20-ahb". For
+ Tegra30, must contain "nvidia,tegra30-ahb". Otherwise, must contain
+ '"nvidia,<chip>-ahb", "nvidia,tegra30-ahb"' where <chip> is tegra124,
+ tegra132, or tegra210.
- reg : Should contain 1 register ranges(address and length)
Example:
diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
index 68ac65f82a1c..dd75b972ee37 100644
--- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
+++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
@@ -6,7 +6,11 @@ modes. It provides power-gating controllers for SoC and CPU power-islands.
Required properties:
- name : Should be pmc
-- compatible : Should contain "nvidia,tegra<chip>-pmc".
+- compatible : For Tegra20, must contain "nvidia,tegra20-pmc". For Tegra30,
+ must contain "nvidia,tegra30-pmc". For Tegra114, must contain
+ "nvidia,tegra114-pmc". For Tegra124, must contain "nvidia,tegra124-pmc".
+ Otherwise, must contain "nvidia,<chip>-pmc", plus at least one of the
+ above, where <chip> is tegra132.
- reg : Offset and length of the register set for the device
- clocks : Must contain an entry for each entry in clock-names.
See ../clocks/clock-bindings.txt for details.
diff --git a/Documentation/devicetree/bindings/ata/tegra-sata.txt b/Documentation/devicetree/bindings/ata/tegra-sata.txt
index 946f2072570b..66c83c3e8915 100644
--- a/Documentation/devicetree/bindings/ata/tegra-sata.txt
+++ b/Documentation/devicetree/bindings/ata/tegra-sata.txt
@@ -1,7 +1,9 @@
Tegra124 SoC SATA AHCI controller
Required properties :
-- compatible : "nvidia,tegra124-ahci".
+- compatible : For Tegra124, must contain "nvidia,tegra124-ahci". Otherwise,
+ must contain '"nvidia,<chip>-ahci", "nvidia,tegra124-ahci"', where <chip>
+ is tegra132.
- reg : Should contain 2 entries:
- AHCI register set (SATA BAR5)
- SATA register set
diff --git a/Documentation/devicetree/bindings/fpga/altera-socfpga-fpga-mgr.txt b/Documentation/devicetree/bindings/fpga/altera-socfpga-fpga-mgr.txt
new file mode 100644
index 000000000000..9b027a615486
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/altera-socfpga-fpga-mgr.txt
@@ -0,0 +1,17 @@
+Altera SOCFPGA FPGA Manager
+
+Required properties:
+- compatible : should contain "altr,socfpga-fpga-mgr"
+- reg : base address and size for memory mapped io.
+ - The first index is for FPGA manager register access.
+ - The second index is for writing FPGA configuration data.
+- interrupts : interrupt for the FPGA Manager device.
+
+Example:
+
+ hps_0_fpgamgr: fpgamgr@0xff706000 {
+ compatible = "altr,socfpga-fpga-mgr";
+ reg = <0xFF706000 0x1000
+ 0xFFB90000 0x1000>;
+ interrupts = <0 175 4>;
+ };
diff --git a/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt b/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt
index d8c98c7614d0..23e1d3194174 100644
--- a/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt
+++ b/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt
@@ -1,11 +1,11 @@
NVIDIA Tegra20/Tegra30/Tegr114/Tegra124 fuse block.
Required properties:
-- compatible : should be:
- "nvidia,tegra20-efuse"
- "nvidia,tegra30-efuse"
- "nvidia,tegra114-efuse"
- "nvidia,tegra124-efuse"
+- compatible : For Tegra20, must contain "nvidia,tegra20-efuse". For Tegra30,
+ must contain "nvidia,tegra30-efuse". For Tegra114, must contain
+ "nvidia,tegra114-efuse". For Tegra124, must contain "nvidia,tegra124-efuse".
+ Otherwise, must contain "nvidia,<chip>-efuse", plus one of the above, where
+ <chip> is tegra132.
Details:
nvidia,tegra20-efuse: Tegra20 requires using APB DMA to read the fuse data
due to a hardware bug. Tegra20 also lacks certain information which is
diff --git a/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt b/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt
index 4c32ef0b7db8..009f4bfa1590 100644
--- a/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt
+++ b/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt
@@ -197,7 +197,9 @@ of the following host1x client modules:
- sor: serial output resource
Required properties:
- - compatible: "nvidia,tegra124-sor"
+ - compatible: For Tegra124, must contain "nvidia,tegra124-sor". Otherwise,
+ must contain '"nvidia,<chip>-sor", "nvidia,tegra124-sor"', where <chip>
+ is tegra132.
- reg: Physical base address and length of the controller's registers.
- interrupts: The interrupt outputs from the controller.
- clocks: Must contain an entry for each entry in clock-names.
@@ -222,7 +224,9 @@ of the following host1x client modules:
- nvidia,dpaux: phandle to a DispayPort AUX interface
- dpaux: DisplayPort AUX interface
- - compatible: "nvidia,tegra124-dpaux"
+ - compatible: For Tegra124, must contain "nvidia,tegra124-dpaux". Otherwise,
+ must contain '"nvidia,<chip>-dpaux", "nvidia,tegra124-dpaux"', where
+ <chip> is tegra132.
- reg: Physical base address and length of the controller's registers.
- interrupts: The interrupt outputs from the controller.
- clocks: Must contain an entry for each entry in clock-names.
diff --git a/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt b/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt
index 87507e9ce6db..656716b72cc4 100644
--- a/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt
+++ b/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt
@@ -1,11 +1,11 @@
NVIDIA Tegra20/Tegra30/Tegra114 I2C controller driver.
Required properties:
-- compatible : should be:
- "nvidia,tegra114-i2c"
- "nvidia,tegra30-i2c"
- "nvidia,tegra20-i2c"
- "nvidia,tegra20-i2c-dvc"
+- compatible : For Tegra20, must be one of "nvidia,tegra20-i2c-dvc" or
+ "nvidia,tegra20-i2c". For Tegra30, must be "nvidia,tegra30-i2c".
+ For Tegra114, must be "nvidia,tegra114-i2c". Otherwise, must be
+ "nvidia,<chip>-i2c", plus at least one of the above, where <chip> is
+ tegra124, tegra132, or tegra210.
Details of compatible are as follows:
nvidia,tegra20-i2c-dvc: Tegra20 has specific I2C controller called as DVC I2C
controller. This only support master mode of I2C communication. Register
diff --git a/Documentation/devicetree/bindings/media/atmel-isi.txt b/Documentation/devicetree/bindings/media/atmel-isi.txt
index 17e71b7b44c6..251f008f220c 100644
--- a/Documentation/devicetree/bindings/media/atmel-isi.txt
+++ b/Documentation/devicetree/bindings/media/atmel-isi.txt
@@ -38,7 +38,7 @@ Example:
i2c1: i2c@f0018000 {
ov2640: camera@0x30 {
- compatible = "omnivision,ov2640";
+ compatible = "ovti,ov2640";
reg = <0x30>;
port {
diff --git a/Documentation/devicetree/bindings/media/video-interfaces.txt b/Documentation/devicetree/bindings/media/video-interfaces.txt
index 52a14cf099ac..571b4c60665f 100644
--- a/Documentation/devicetree/bindings/media/video-interfaces.txt
+++ b/Documentation/devicetree/bindings/media/video-interfaces.txt
@@ -162,7 +162,7 @@ pipelines can be active: ov772x -> ceu0 or imx074 -> csi2 -> ceu0.
i2c0: i2c@0xfff20000 {
...
ov772x_1: camera@0x21 {
- compatible = "omnivision,ov772x";
+ compatible = "ovti,ov772x";
reg = <0x21>;
vddio-supply = <&regulator1>;
vddcore-supply = <&regulator2>;
diff --git a/Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt b/Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt
index b97b8bef1fe5..47b205cc9cc7 100644
--- a/Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt
+++ b/Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt
@@ -1,11 +1,10 @@
NVIDIA Tegra20/Tegra30/Tegr114/Tegra124 apbmisc block
Required properties:
-- compatible : should be:
- "nvidia,tegra20-apbmisc"
- "nvidia,tegra30-apbmisc"
- "nvidia,tegra114-apbmisc"
- "nvidia,tegra124-apbmisc"
+- compatible : For Tegra20, must be "nvidia,tegra20-apbmisc". For Tegra30,
+ must be "nvidia,tegra30-apbmisc". Otherwise, must contain
+ "nvidia,<chip>-apbmisc", plus one of the above, where <chip> is tegra114,
+ tegra124, tegra132.
- reg: Should contain 2 entries: the first entry gives the physical address
and length of the registers which contain revision and debug features.
The second entry gives the physical address and length of the
diff --git a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt
index f357c16ea815..15b8368ee1f2 100644
--- a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt
+++ b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt
@@ -7,7 +7,11 @@ This file documents differences between the core properties described
by mmc.txt and the properties used by the sdhci-tegra driver.
Required properties:
-- compatible : Should be "nvidia,<chip>-sdhci"
+- compatible : For Tegra20, must contain "nvidia,tegra20-sdhci".
+ For Tegra30, must contain "nvidia,tegra30-sdhci". For Tegra114,
+ must contain "nvidia,tegra114-sdhci". For Tegra124, must contain
+ "nvidia,tegra124-sdhci". Otherwise, must contain "nvidia,<chip>-sdhci",
+ plus one of the above, where <chip> is tegra132 or tegra210.
- clocks : Must contain one entry, for the module clock.
See ../clocks/clock-bindings.txt for details.
- resets : Must contain an entry for each entry in reset-names.
diff --git a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
index d763e047c6ae..75321ae23c08 100644
--- a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
@@ -1,10 +1,10 @@
NVIDIA Tegra PCIe controller
Required properties:
-- compatible: Must be one of:
- - "nvidia,tegra20-pcie"
- - "nvidia,tegra30-pcie"
- - "nvidia,tegra124-pcie"
+- compatible: For Tegra20, must contain "nvidia,tegra20-pcie". For Tegra30,
+ "nvidia,tegra30-pcie". For Tegra124, must contain "nvidia,tegra124-pcie".
+ Otherwise, must contain "nvidia,<chip>-pcie", plus one of the above, where
+ <chip> is tegra132 or tegra210.
- device_type: Must be "pci"
- reg: A list of physical base address and length for each set of controller
registers. Must contain an entry for each entry in the reg-names property.
diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt
index 189814e7cdc7..ecb5c0d25218 100644
--- a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt
+++ b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt
@@ -6,7 +6,8 @@ nvidia,tegra30-pinmux.txt. In fact, this document assumes that binding as
a baseline, and only documents the differences between the two bindings.
Required properties:
-- compatible: "nvidia,tegra124-pinmux"
+- compatible: For Tegra124, must contain "nvidia,tegra124-pinmux". For
+ Tegra132, must contain '"nvidia,tegra132-pinmux", "nvidia-tegra124-pinmux"'.
- reg: Should contain a list of base address and size pairs for:
-- first entry - the drive strength and pad control registers.
-- second entry - the pinmux registers
diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-xusb-padctl.txt b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-xusb-padctl.txt
index 2f9c0bd66457..30676ded85bb 100644
--- a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-xusb-padctl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-xusb-padctl.txt
@@ -13,7 +13,9 @@ how to describe and reference PHYs in device trees.
Required properties:
--------------------
-- compatible: should be "nvidia,tegra124-xusb-padctl"
+- compatible: For Tegra124, must contain "nvidia,tegra124-xusb-padctl".
+ Otherwise, must contain '"nvidia,<chip>-xusb-padctl",
+ "nvidia-tegra124-xusb-padctl"', where <chip> is tegra132 or tegra210.
- reg: Physical base address and length of the controller's registers.
- resets: Must contain an entry for each entry in reset-names.
See ../reset/reset.txt for details.
diff --git a/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt b/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt
index c7ea9d4a988b..c52f03b5032f 100644
--- a/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt
+++ b/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt
@@ -1,9 +1,10 @@
Tegra SoC PWFM controller
Required properties:
-- compatible: should be one of:
- - "nvidia,tegra20-pwm"
- - "nvidia,tegra30-pwm"
+- compatible: For Tegra20, must contain "nvidia,tegra20-pwm". For Tegra30,
+ must contain "nvidia,tegra30-pwm". Otherwise, must contain
+ "nvidia,<chip>-pwm", plus one of the above, where <chip> is tegra114,
+ tegra124, tegra132, or tegra210.
- reg: physical base address and length of the controller's registers
- #pwm-cells: should be 2. See pwm.txt in this directory for a description of
the cells format.
diff --git a/Documentation/devicetree/bindings/rtc/nvidia,tegra20-rtc.txt b/Documentation/devicetree/bindings/rtc/nvidia,tegra20-rtc.txt
index 652d1ff2e8be..b7d98ed3e098 100644
--- a/Documentation/devicetree/bindings/rtc/nvidia,tegra20-rtc.txt
+++ b/Documentation/devicetree/bindings/rtc/nvidia,tegra20-rtc.txt
@@ -6,7 +6,9 @@ state.
Required properties:
-- compatible : should be "nvidia,tegra20-rtc".
+- compatible : For Tegra20, must contain "nvidia,tegra20-rtc". Otherwise,
+ must contain '"nvidia,<chip>-rtc", "nvidia,tegra20-rtc"', where <chip>
+ can be tegra30, tegra114, tegra124, or tegra132.
- reg : Specifies base physical address and size of the registers.
- interrupts : A single interrupt specifier.
- clocks : Must contain one entry, for the module clock.
diff --git a/Documentation/devicetree/bindings/serial/of-serial.txt b/Documentation/devicetree/bindings/serial/of-serial.txt
index b52b98234b9b..bea60ef6cdc5 100644
--- a/Documentation/devicetree/bindings/serial/of-serial.txt
+++ b/Documentation/devicetree/bindings/serial/of-serial.txt
@@ -8,7 +8,10 @@ Required properties:
- "ns16550"
- "ns16750"
- "ns16850"
- - "nvidia,tegra20-uart"
+ - For Tegra20, must contain "nvidia,tegra20-uart"
+ - For other Tegra, must contain '"nvidia,<chip>-uart",
+ "nvidia,tegra20-uart"' where <chip> is tegra30, tegra114, tegra124,
+ tegra132, or tegra210.
- "nxp,lpc3220-uart"
- "ralink,rt2880-uart"
- "ibm,qpace-nwp-serial"
diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra30-ahub.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra30-ahub.txt
index 946e2ac46091..0e9a1895d7fb 100644
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra30-ahub.txt
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra30-ahub.txt
@@ -1,7 +1,10 @@
NVIDIA Tegra30 AHUB (Audio Hub)
Required properties:
-- compatible : "nvidia,tegra30-ahub", "nvidia,tegra114-ahub", etc.
+- compatible : For Tegra30, must contain "nvidia,tegra30-ahub". For Tegra114,
+ must contain "nvidia,tegra114-ahub". For Tegra124, must contain
+ "nvidia,tegra124-ahub". Otherwise, must contain "nvidia,<chip>-ahub",
+ plus at least one of the above, where <chip> is tegra132.
- reg : Should contain the register physical address and length for each of
the AHUB's register blocks.
- Tegra30 requires 2 entries, for the APBIF and AHUB/AUDIO register blocks.
diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra30-hda.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra30-hda.txt
index b4730c2822bc..13e2ef496724 100644
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra30-hda.txt
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra30-hda.txt
@@ -1,7 +1,9 @@
NVIDIA Tegra30 HDA controller
Required properties:
-- compatible : "nvidia,tegra30-hda"
+- compatible : For Tegra30, must contain "nvidia,tegra30-hda". Otherwise,
+ must contain '"nvidia,<chip>-hda", "nvidia,tegra30-hda"', where <chip> is
+ tegra114, tegra124, or tegra132.
- reg : Should contain the HDA registers location and length.
- interrupts : The interrupt from the HDA controller.
- clocks : Must contain an entry for each required entry in clock-names.
diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.txt
index 0c113ffe3814..38caa936f6f8 100644
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.txt
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra30-i2s.txt
@@ -1,7 +1,10 @@
NVIDIA Tegra30 I2S controller
Required properties:
-- compatible : "nvidia,tegra30-i2s"
+- compatible : For Tegra30, must contain "nvidia,tegra30-i2s". For Tegra124,
+ must contain "nvidia,tegra124-i2s". Otherwise, must contain
+ "nvidia,<chip>-i2s" plus at least one of the above, where <chip> is
+ tegra114 or tegra132.
- reg : Should contain I2S registers location and length
- clocks : Must contain one entry, for the module clock.
See ../clocks/clock-bindings.txt for details.
diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt b/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt
index 7ea701e07dc2..b785976fe98a 100644
--- a/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt
+++ b/Documentation/devicetree/bindings/spi/nvidia,tegra114-spi.txt
@@ -1,7 +1,9 @@
NVIDIA Tegra114 SPI controller.
Required properties:
-- compatible : should be "nvidia,tegra114-spi".
+- compatible : For Tegra114, must contain "nvidia,tegra114-spi".
+ Otherwise, must contain '"nvidia,<chip>-spi", "nvidia,tegra114-spi"' where
+ <chip> is tegra124, tegra132, or tegra210.
- reg: Should contain SPI registers location and length.
- interrupts: Should contain SPI interrupts.
- clock-names : Must include the following entries:
diff --git a/Documentation/devicetree/bindings/submitting-patches.txt b/Documentation/devicetree/bindings/submitting-patches.txt
index b7ba01ad1426..56742bc70218 100644
--- a/Documentation/devicetree/bindings/submitting-patches.txt
+++ b/Documentation/devicetree/bindings/submitting-patches.txt
@@ -15,6 +15,29 @@ I. For patch submitters
3) The Documentation/ portion of the patch should come in the series before
the code implementing the binding.
+ 4) Any compatible strings used in a chip or board DTS file must be
+ previously documented in the corresponding DT binding text file
+ in Documentation/devicetree/bindings. This rule applies even if
+ the Linux device driver does not yet match on the compatible
+ string. [ checkpatch will emit warnings if this step is not
+ followed as of commit bff5da4335256513497cc8c79f9a9d1665e09864
+ ("checkpatch: add DT compatible string documentation checks"). ]
+
+ 5) The wildcard "<chip>" may be used in compatible strings, as in
+ the following example:
+
+ - compatible: Must contain '"nvidia,<chip>-pcie",
+ "nvidia,tegra20-pcie"' where <chip> is tegra30, tegra132, ...
+
+ As in the above example, the known values of "<chip>" should be
+ documented if it is used.
+
+ 6) If a documented compatible string is not yet matched by the
+ driver, the documentation should also include a compatible
+ string that is matched by the driver (as in the "nvidia,tegra20-pcie"
+ example above).
+
+
II. For kernel maintainers
1) If you aren't comfortable reviewing a given binding, reply to it and ask
diff --git a/Documentation/devicetree/bindings/thermal/tegra-soctherm.txt b/Documentation/devicetree/bindings/thermal/tegra-soctherm.txt
index ecf3ed76cd46..6b68cd150405 100644
--- a/Documentation/devicetree/bindings/thermal/tegra-soctherm.txt
+++ b/Documentation/devicetree/bindings/thermal/tegra-soctherm.txt
@@ -7,7 +7,9 @@ notifications. It is also used to manage emergency shutdown in an
overheating situation.
Required properties :
-- compatible : "nvidia,tegra124-soctherm".
+- compatible : For Tegra124, must contain "nvidia,tegra124-soctherm".
+ For Tegra132, must contain "nvidia,tegra132-soctherm".
+ For Tegra210, must contain "nvidia,tegra210-soctherm".
- reg : Should contain 1 entry:
- SOCTHERM register set
- interrupts : Defines the interrupt used by SOCTHERM
diff --git a/Documentation/devicetree/bindings/timer/nvidia,tegra30-timer.txt b/Documentation/devicetree/bindings/timer/nvidia,tegra30-timer.txt
index b5082a1cf461..1761f53ee36f 100644
--- a/Documentation/devicetree/bindings/timer/nvidia,tegra30-timer.txt
+++ b/Documentation/devicetree/bindings/timer/nvidia,tegra30-timer.txt
@@ -6,7 +6,9 @@ trigger a legacy watchdog reset.
Required properties:
-- compatible : should be "nvidia,tegra30-timer", "nvidia,tegra20-timer".
+- compatible : For Tegra30, must contain "nvidia,tegra30-timer". Otherwise,
+ must contain '"nvidia,<chip>-timer", "nvidia,tegra30-timer"' where
+ <chip> is tegra124 or tegra132.
- reg : Specifies base physical address and size of the registers.
- interrupts : A list of 6 interrupts; one per each of timer channels 1
through 5, and one for the shared interrupt for the remaining channels.
diff --git a/Documentation/devicetree/bindings/unittest.txt b/Documentation/devicetree/bindings/unittest.txt
index 0f92a22fddfa..8933211f32f9 100644
--- a/Documentation/devicetree/bindings/unittest.txt
+++ b/Documentation/devicetree/bindings/unittest.txt
@@ -1,4 +1,4 @@
-* OF selftest platform device
+1) OF selftest platform device
** selftest
@@ -12,3 +12,60 @@ Example:
compatible = "selftest";
status = "okay";
};
+
+2) OF selftest i2c adapter platform device
+
+** platform device unittest adapter
+
+Required properties:
+- compatible: must be selftest-i2c-bus
+
+Children nodes contain selftest i2c devices.
+
+Example:
+ selftest-i2c-bus {
+ compatible = "selftest-i2c-bus";
+ status = "okay";
+ };
+
+3) OF selftest i2c device
+
+** I2C selftest device
+
+Required properties:
+- compatible: must be selftest-i2c-dev
+
+All other properties are optional
+
+Example:
+ selftest-i2c-dev {
+ compatible = "selftest-i2c-dev";
+ status = "okay";
+ };
+
+4) OF selftest i2c mux device
+
+** I2C selftest mux
+
+Required properties:
+- compatible: must be selftest-i2c-mux
+
+Children nodes contain selftest i2c bus nodes per channel.
+
+Example:
+ selftest-i2c-mux {
+ compatible = "selftest-i2c-mux";
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ channel-0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-dev {
+ reg = <8>;
+ compatible = "selftest-i2c-dev";
+ status = "okay";
+ };
+ };
+ };
diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt b/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt
index 3dc9140e3dfb..f60785f73d3d 100644
--- a/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt
+++ b/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt
@@ -6,7 +6,10 @@ Practice : Universal Serial Bus" with the following modifications
and additions :
Required properties :
- - compatible : Should be "nvidia,tegra20-ehci".
+ - compatible : For Tegra20, must contain "nvidia,tegra20-ehci".
+ For Tegra30, must contain "nvidia,tegra30-ehci". Otherwise, must contain
+ "nvidia,<chip>-ehci" plus at least one of the above, where <chip> is
+ tegra114, tegra124, tegra132, or tegra210.
- nvidia,phy : phandle of the PHY that the controller is connected to.
- clocks : Must contain one entry, for the module clock.
See ../clocks/clock-bindings.txt for details.
diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt b/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt
index c9205fbf26e2..a9aa79fb90ed 100644
--- a/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt
+++ b/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt
@@ -3,7 +3,10 @@ Tegra SOC USB PHY
The device node for Tegra SOC USB PHY:
Required properties :
- - compatible : Should be "nvidia,tegra<chip>-usb-phy".
+ - compatible : For Tegra20, must contain "nvidia,tegra20-usb-phy".
+ For Tegra30, must contain "nvidia,tegra30-usb-phy". Otherwise, must contain
+ "nvidia,<chip>-usb-phy" plus at least one of the above, where <chip> is
+ tegra114, tegra124, tegra132, or tegra210.
- reg : Defines the following set of registers, in the order listed:
- The PHY's own register set.
Always present.
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index e344fa2f6c4d..7075698abd8c 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -7,6 +7,7 @@ abilis Abilis Systems
active-semi Active-Semi International Inc
ad Avionic Design GmbH
adapteva Adapteva, Inc.
+adh AD Holdings Plc.
adi Analog Devices, Inc.
aeroflexgaisler Aeroflex Gaisler AB
allwinner Allwinner Technology Co., Ltd.
@@ -57,6 +58,7 @@ est ESTeem Wireless Modems
ettus NI Ettus Research
eukrea Eukréa Electromatique
everest Everest Semiconductor Co. Ltd.
+everspin Everspin Technologies, Inc.
excito Excito
fcs Fairchild Semiconductor
fsl Freescale Semiconductor
@@ -70,6 +72,7 @@ gumstix Gumstix, Inc.
gw Gateworks Corporation
hannstar HannStar Display Corporation
haoyu Haoyu Microelectronic Co. Ltd.
+himax Himax Technologies, Inc.
hisilicon Hisilicon Limited.
hit Hitachi Ltd.
honeywell Honeywell
@@ -83,8 +86,7 @@ innolux Innolux Corporation
intel Intel Corporation
intercontrol Inter Control Group
isee ISEE 2007 S.L.
-isil Intersil (deprecated, use isl)
-isl Intersil
+isil Intersil
karo Ka-Ro electronics GmbH
keymile Keymile GmbH
lacie LaCie
@@ -119,6 +121,7 @@ nvidia NVIDIA
nxp NXP Semiconductors
onnn ON Semiconductor Corp.
opencores OpenCores.org
+ovti OmniVision Technologies
panasonic Panasonic Corporation
pericom Pericom Technology Inc.
phytec PHYTEC Messtechnik GmbH
@@ -146,6 +149,7 @@ seagate Seagate Technology PLC
semtech Semtech Corporation
sil Silicon Image
silabs Silicon Laboratories
+siliconmitus Silicon Mitus, Inc.
simtek
sii Seiko Instruments, Inc.
silergy Silergy Corp.
@@ -167,6 +171,7 @@ tlm Trusted Logic Mobility
toradex Toradex AG
toshiba Toshiba Corporation
toumaz Toumaz
+truly Truly Semiconductors Limited
usi Universal Scientific Industrial Co., Ltd.
v3 V3 Semiconductor
variscite Variscite Ltd.