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authorPraneeth Bajjuri <praneeth@ti.com>2015-03-25 18:25:09 -0500
committerTony Lindgren <tony@atomide.com>2015-03-27 14:38:03 -0700
commit209431eff8afb928d72200c79153165c7d860ca0 (patch)
tree3a7a70a236da00c79f571699bb4ce7439b783e75 /MAINTAINERS
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ARM: DRA7: Enable Cortex A15 errata 798181
ARM errata 798181 is applicable for OMAP5/DRA7 based devices. So enable the same in the build. DRA7xx is based on Cortex-A15 r2p2 revision. ARM Errata extract and workaround information is as below. On Cortex-A15 (r0p0..r3p2) the TLBI*IS/DSB operations are not adequately shooting down all use of the old entries. The ARM_ERRATA_798181 option enables the Linux kernel workaround for this erratum which sends an IPI to the CPUs that are running the same ASID as the one being invalidated. Signed-off-by: Praneeth Bajjuri <praneeth@ti.com> Acked-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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