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| author | Andre Przywara <andre.przywara@arm.com> | 2020-08-28 14:06:00 +0100 |
|---|---|---|
| committer | Florian Fainelli <f.fainelli@gmail.com> | 2020-09-10 13:35:19 -0700 |
| commit | 9d6693369fc782b33168255fe3cd760796dba59c (patch) | |
| tree | 699b3477fda29919d799aa2edf03929b71ad1421 /arch/arm/boot/dts/bcm-cygnus.dtsi | |
| parent | 5d00306e3aae170658e27413b6d7bf211547ea0f (diff) | |
| download | linux-9d6693369fc782b33168255fe3cd760796dba59c.tar.gz linux-9d6693369fc782b33168255fe3cd760796dba59c.tar.bz2 linux-9d6693369fc782b33168255fe3cd760796dba59c.zip | |
ARM: dts: Cygnus: Fix SP805 clocks
The SP805 DT binding requires two clocks to be specified, but the
Broadcom Cygnus DT currently only specifies one clock.
In practice, Linux would pick a clock named "apb_pclk" for the bus
clock, and the Linux and U-Boot SP805 driver would use the first clock
to derive the actual watchdog counter frequency.
Since currently both are the very same clock, we can just double the
clock reference, and add the correct clock-names, to match the binding.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Diffstat (limited to 'arch/arm/boot/dts/bcm-cygnus.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/bcm-cygnus.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi index 35bdd0969f0a..dacaef2c14ca 100644 --- a/arch/arm/boot/dts/bcm-cygnus.dtsi +++ b/arch/arm/boot/dts/bcm-cygnus.dtsi @@ -234,8 +234,8 @@ compatible = "arm,sp805" , "arm,primecell"; reg = <0x18009000 0x1000>; interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&axi81_clk>; - clock-names = "apb_pclk"; + clocks = <&axi81_clk>, <&axi81_clk>; + clock-names = "wdog_clk", "apb_pclk"; }; gpio_ccm: gpio@1800a000 { |