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author | Tony Lindgren <tony@atomide.com> | 2020-12-08 16:08:02 +0200 |
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committer | Tony Lindgren <tony@atomide.com> | 2020-12-30 10:47:26 +0200 |
commit | 7078a5ba7a58e5db07583b176f8a03e0b8714731 (patch) | |
tree | 47e7b2fa4a497406895b612731b33cf1d927f653 /arch/arm/boot/dts/hip01-ca9x2.dts | |
parent | 500050f0d28868af302a3c24d7d1d0191521286e (diff) | |
download | linux-7078a5ba7a58e5db07583b176f8a03e0b8714731.tar.gz linux-7078a5ba7a58e5db07583b176f8a03e0b8714731.tar.bz2 linux-7078a5ba7a58e5db07583b176f8a03e0b8714731.zip |
soc: ti: omap-prm: Fix boot time errors for rst_map_012 bits 0 and 1
We have rst_map_012 used for various accelerators like dsp, ipu and iva.
For these use cases, we have rstctrl bit 2 control the subsystem module
reset, and have and bits 0 and 1 control the accelerator specific
features.
If the bootloader, or kexec boot, has left any accelerator specific
reset bits deasserted, deasserting bit 2 reset will potentially enable
an accelerator with unconfigured MMU and no firmware. And we may get
spammed with a lot by warnings on boot with "Data Access in User mode
during Functional access", or depending on the accelerator, the system
can also just hang.
This issue can be quite easily reproduced by setting a rst_map_012 type
rstctrl register to 0 or 4 in the bootloader, and booting the system.
Let's just assert all reset bits for rst_map_012 type resets. So far
it looks like the other rstctrl types don't need this. If it turns out
that the other type rstctrl bits also need reset on init, we need to
add an instance specific reset mask for the bits to avoid resetting
unwanted bits.
Reported-by: Carl Philipp Klemm <philipp@uvos.xyz>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: Santosh Shilimkar <ssantosh@kernel.org>
Cc: Suman Anna <s-anna@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Tested-by: Carl Philipp Klemm <philipp@uvos.xyz>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/hip01-ca9x2.dts')
0 files changed, 0 insertions, 0 deletions