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authorLinus Torvalds <torvalds@linux-foundation.org>2011-11-01 19:55:06 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2011-11-01 19:55:06 -0700
commit68e24ba70465b82ad24e0774ceab5360180d4627 (patch)
tree5d2b8e22e556360f353b2d1c73a19aaf6c5becd9 /arch/arm/include/asm/hardware
parentb4beb4bf9934d151bf4581a54ae028927374cb2a (diff)
parent5725aeae5ff2e39f3815bbef788ee326c9afea2c (diff)
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Merge branch 'next/fixes' of git://git.linaro.org/people/arnd/arm-soc
* 'next/fixes' of git://git.linaro.org/people/arnd/arm-soc: (28 commits) ARM: pxa/cm-x300: properly set bt_reset pin ARM: mmp: rename SHEEVAD to GPLUGD ARM: imx: Fix typo 'MACH_MX31_3DS_MXC_NAND_USE_BBT' ARM: i.MX28: shift frac value in _CLK_SET_RATE plat-mxc: iomux-v3.h: implicitly enable pull-up/down when that's desired ARM: mx5: fix clock usage for suspend ARM: pxa: use correct __iomem annotations ARM: pxa: sharpsl pm needs SPI ARM: pxa: centro and treo680 need palm27x ARM: pxa: make pxafb_smart_*() empty when not enabled ARM: pxa: select POWER_SUPPLY on raumfeld ARM: pxa: pxa95x is incompatible with earlier pxa ARM: pxa: CPU_FREQ_TABLE is needed for CPU_FREQ ARM: pxa: pxa95x/saarb depends on pxa3xx code ARM: pxa: allow selecting just one of TREO680/CENTRO ARM: pxa: export symbols from pxa3xx-ulpi ARM: pxa: make zylonite_pxa*_init declaration match code ARM: pxa/z2: fix building error of pxa27x_cpu_suspend() no longer available ARM: at91: add defconfig for at91sam9g45 family ARM: at91: remove dependency for Atmel PWM driver selector in Kconfig ...
Diffstat (limited to 'arch/arm/include/asm/hardware')
-rw-r--r--arch/arm/include/asm/hardware/it8152.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/include/asm/hardware/it8152.h b/arch/arm/include/asm/hardware/it8152.h
index b3fea38d55c6..43cab498bc27 100644
--- a/arch/arm/include/asm/hardware/it8152.h
+++ b/arch/arm/include/asm/hardware/it8152.h
@@ -9,7 +9,7 @@
#ifndef __ASM_HARDWARE_IT8152_H
#define __ASM_HARDWARE_IT8152_H
-extern unsigned long it8152_base_address;
+extern void __iomem *it8152_base_address;
#define IT8152_IO_BASE (it8152_base_address + 0x03e00000)
#define IT8152_CFGREG_BASE (it8152_base_address + 0x03f00000)