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| author | Eric Auger <eric.auger@linaro.org> | 2015-03-04 11:14:36 +0100 |
|---|---|---|
| committer | Christoffer Dall <christoffer.dall@linaro.org> | 2015-03-12 15:15:34 +0100 |
| commit | 174178fed338edba66ab9580af0c5d9e1a4e5019 (patch) | |
| tree | c290d6b6ae1464dd7dc72bfe63e0bb0553eac460 /arch/arm/include | |
| parent | 649cf73994e8ac69dfe3e7a35fba9acf051e7fe6 (diff) | |
| download | linux-174178fed338edba66ab9580af0c5d9e1a4e5019.tar.gz linux-174178fed338edba66ab9580af0c5d9e1a4e5019.tar.bz2 linux-174178fed338edba66ab9580af0c5d9e1a4e5019.zip | |
KVM: arm/arm64: add irqfd support
This patch enables irqfd on arm/arm64.
Both irqfd and resamplefd are supported. Injection is implemented
in vgic.c without routing.
This patch enables CONFIG_HAVE_KVM_EVENTFD and CONFIG_HAVE_KVM_IRQFD.
KVM_CAP_IRQFD is now advertised. KVM_CAP_IRQFD_RESAMPLE capability
automatically is advertised as soon as CONFIG_HAVE_KVM_IRQFD is set.
Irqfd injection is restricted to SPI. The rationale behind not
supporting PPI irqfd injection is that any device using a PPI would
be a private-to-the-CPU device (timer for instance), so its state
would have to be context-switched along with the VCPU and would
require in-kernel wiring anyhow. It is not a relevant use case for
irqfds.
Signed-off-by: Eric Auger <eric.auger@linaro.org>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Diffstat (limited to 'arch/arm/include')
| -rw-r--r-- | arch/arm/include/uapi/asm/kvm.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/include/uapi/asm/kvm.h b/arch/arm/include/uapi/asm/kvm.h index 0db25bc32864..2499867dd0d8 100644 --- a/arch/arm/include/uapi/asm/kvm.h +++ b/arch/arm/include/uapi/asm/kvm.h @@ -198,6 +198,9 @@ struct kvm_arch_memory_slot { /* Highest supported SPI, from VGIC_NR_IRQS */ #define KVM_ARM_IRQ_GIC_MAX 127 +/* One single KVM irqchip, ie. the VGIC */ +#define KVM_NR_IRQCHIPS 1 + /* PSCI interface */ #define KVM_PSCI_FN_BASE 0x95c1ba5e #define KVM_PSCI_FN(n) (KVM_PSCI_FN_BASE + (n)) |