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authorSakari Ailus <sakari.ailus@linux.intel.com>2017-08-14 06:22:14 -0400
committerMauro Carvalho Chehab <mchehab@s-opensource.com>2017-08-26 13:51:57 -0400
commit1526c704b3c32640b5e6cdc1662b0698603e9d4f (patch)
tree27702798027d35c301dc4239d4eacb44559e8e29 /arch/arm/kernel/swp_emulate.c
parentb24f021579c5384ea9ba22decec84e757d5fbd09 (diff)
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media: v4l: fwnode: The clock lane is the first lane in lane_polarities
The clock lane is the first lane in the lane_polarities array. Reflect this consistently by putting the number of data lanes after the number of clock lanes. Fixes: 4ee236219f6d ("media: v4l2-fwnode: suppress a warning at OF parsing logic") Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Diffstat (limited to 'arch/arm/kernel/swp_emulate.c')
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