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| author | Arnd Bergmann <arnd@arndb.de> | 2019-07-31 21:56:54 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2019-08-14 19:24:57 +0200 |
| commit | ce78179ea6e042e2d3af0a1c71c105431ead483a (patch) | |
| tree | a37e73fdf45369d34978756e9ab6fb758bfb479e /arch/arm/mach-dove/bridge-regs.h | |
| parent | a3950da161a6fdb8099a00b936dcf848639f7ab6 (diff) | |
| download | linux-ce78179ea6e042e2d3af0a1c71c105431ead483a.tar.gz linux-ce78179ea6e042e2d3af0a1c71c105431ead483a.tar.bz2 linux-ce78179ea6e042e2d3af0a1c71c105431ead483a.zip | |
ARM: dove: clean up mach/*.h headers
This is a simple move of all header files that are no longer
included by anything else from the include/mach directory
to the platform directory itself as preparation for
multiplatform support.
The mach/uncompress.h headers are left in place for now,
and are mildly modified to be independent of the other
headers. They will be removed entirely when ARCH_MULTIPLATFORM
gets enabled and they become obsolete.
Rather than updating the path names inside of the comments
of each header, I delete those comments to avoid having to
update them again, should they get moved or copied another
time.
Link: https://lore.kernel.org/r/20190731195713.3150463-13-arnd@arndb.de
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-dove/bridge-regs.h')
| -rw-r--r-- | arch/arm/mach-dove/bridge-regs.h | 55 |
1 files changed, 55 insertions, 0 deletions
diff --git a/arch/arm/mach-dove/bridge-regs.h b/arch/arm/mach-dove/bridge-regs.h new file mode 100644 index 000000000000..ace0b0bfbf11 --- /dev/null +++ b/arch/arm/mach-dove/bridge-regs.h @@ -0,0 +1,55 @@ +/* + * Mbus-L to Mbus Bridge Registers + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __ASM_ARCH_BRIDGE_REGS_H +#define __ASM_ARCH_BRIDGE_REGS_H + +#include "dove.h" + +#define CPU_CONFIG (BRIDGE_VIRT_BASE + 0x0000) + +#define CPU_CONTROL (BRIDGE_VIRT_BASE + 0x0104) +#define CPU_CTRL_PCIE0_LINK 0x00000001 +#define CPU_RESET 0x00000002 +#define CPU_CTRL_PCIE1_LINK 0x00000008 + +#define RSTOUTn_MASK (BRIDGE_VIRT_BASE + 0x0108) +#define RSTOUTn_MASK_PHYS (BRIDGE_PHYS_BASE + 0x0108) +#define SOFT_RESET_OUT_EN 0x00000004 + +#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE + 0x010c) +#define SOFT_RESET 0x00000001 + +#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE + 0x0110) +#define BRIDGE_INT_TIMER1_CLR (~0x0004) + +#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE + 0x0200) +#define IRQ_CAUSE_LOW_OFF 0x0000 +#define IRQ_MASK_LOW_OFF 0x0004 +#define FIQ_MASK_LOW_OFF 0x0008 +#define ENDPOINT_MASK_LOW_OFF 0x000c +#define IRQ_CAUSE_HIGH_OFF 0x0010 +#define IRQ_MASK_HIGH_OFF 0x0014 +#define FIQ_MASK_HIGH_OFF 0x0018 +#define ENDPOINT_MASK_HIGH_OFF 0x001c +#define PCIE_INTERRUPT_MASK_OFF 0x0020 + +#define IRQ_MASK_LOW (IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF) +#define FIQ_MASK_LOW (IRQ_VIRT_BASE + FIQ_MASK_LOW_OFF) +#define ENDPOINT_MASK_LOW (IRQ_VIRT_BASE + ENDPOINT_MASK_LOW_OFF) +#define IRQ_MASK_HIGH (IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF) +#define FIQ_MASK_HIGH (IRQ_VIRT_BASE + FIQ_MASK_HIGH_OFF) +#define ENDPOINT_MASK_HIGH (IRQ_VIRT_BASE + ENDPOINT_MASK_HIGH_OFF) +#define PCIE_INTERRUPT_MASK (IRQ_VIRT_BASE + PCIE_INTERRUPT_MASK_OFF) + +#define POWER_MANAGEMENT (BRIDGE_VIRT_BASE + 0x011c) + +#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE + 0x0300) +#define TIMER_PHYS_BASE (BRIDGE_PHYS_BASE + 0x0300) + +#endif |