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authorHaojian Zhuang <haojian.zhuang@marvell.com>2011-10-17 21:26:55 +0800
committerHaojian Zhuang <hzhuang1@hexinfolabs.org>2011-11-15 19:09:36 +0800
commit389eda15e0f41112d7c44213b3c4f8bd1c9398bc (patch)
treed35d07f3d5f1104d6f0ed3dc95a6ded7de72a270 /arch/arm/mach-mmp/pxa168.c
parentbe24168f144122b3730beab257fa058745d14cb4 (diff)
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ARM: pxa: add clk support in gpio driver
Support clk in gpio driver. There's no gpio clock in PXA25x and PXA27x. So use dummy clk instead. And move the gpio edge initialization into gpio driver for arch-mmp. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Diffstat (limited to 'arch/arm/mach-mmp/pxa168.c')
-rw-r--r--arch/arm/mach-mmp/pxa168.c11
1 files changed, 2 insertions, 9 deletions
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c
index fefdfe59c07c..84245035f351 100644
--- a/arch/arm/mach-mmp/pxa168.c
+++ b/arch/arm/mach-mmp/pxa168.c
@@ -43,18 +43,9 @@ static struct mfp_addr_map pxa168_mfp_addr_map[] __initdata =
MFP_ADDR_END,
};
-static void __init pxa168_init_gpio(void)
-{
- int i;
-
- /* enable GPIO clock */
- __raw_writel(APBC_APBCLK | APBC_FNCLK, APBC_PXA168_GPIO);
-}
-
void __init pxa168_init_irq(void)
{
icu_init_irq();
- pxa168_init_gpio();
}
/* APB peripheral clocks */
@@ -72,6 +63,7 @@ static APBC_CLK(ssp2, PXA168_SSP2, 4, 0);
static APBC_CLK(ssp3, PXA168_SSP3, 4, 0);
static APBC_CLK(ssp4, PXA168_SSP4, 4, 0);
static APBC_CLK(ssp5, PXA168_SSP5, 4, 0);
+static APBC_CLK(gpio, PXA168_GPIO, 0, 13000000);
static APBC_CLK(keypad, PXA168_KPC, 0, 32000);
static APMU_CLK(nand, NAND, 0x19b, 156000000);
@@ -97,6 +89,7 @@ static struct clk_lookup pxa168_clkregs[] = {
INIT_CLKREG(&clk_ssp5, "pxa168-ssp.4", NULL),
INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
INIT_CLKREG(&clk_lcd, "pxa168-fb", NULL),
+ INIT_CLKREG(&clk_gpio, "pxa-gpio", NULL),
INIT_CLKREG(&clk_keypad, "pxa27x-keypad", NULL),
INIT_CLKREG(&clk_eth, "pxa168-eth", "MFUCLK"),
INIT_CLKREG(&clk_usb, "pxa168-ehci", "PXA168-USBCLK"),