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authorTony Lindgren <tony@atomide.com>2016-10-21 03:02:12 -0700
committerTony Lindgren <tony@atomide.com>2016-11-10 14:03:19 -0700
commitd9d9cec02835778e97a4ddc1d601d6b518ddfe89 (patch)
tree125dd9ef812f7327693c992e6eb26d4f089ffd8d /arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
parente9f5f1e456084fc3a2611b3a40ef8b036b2961cb (diff)
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ARM: OMAP2+: Remove legacy data from hwmod for omap3
This data is now coming from device tree so we can remove the duplicate data. Let's keep the DSS and DMA related things for now until those have been converted to device tree completely. While at it, let's also add the trailing commas to data structures so further processing with scripts will be a bit easier. Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c')
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c201
1 files changed, 6 insertions, 195 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
index c6c6384de867..cfaeb0f78cc8 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
@@ -45,204 +45,31 @@ struct omap_hwmod_class omap2_venc_hwmod_class = {
.name = "venc",
};
-
-/* Common DMA request line data */
-struct omap_hwmod_dma_info omap2_uart1_sdma_reqs[] = {
- { .name = "rx", .dma_req = 50, },
- { .name = "tx", .dma_req = 49, },
- { .dma_req = -1 }
-};
-
-struct omap_hwmod_dma_info omap2_uart2_sdma_reqs[] = {
- { .name = "rx", .dma_req = 52, },
- { .name = "tx", .dma_req = 51, },
- { .dma_req = -1 }
-};
-
-struct omap_hwmod_dma_info omap2_uart3_sdma_reqs[] = {
- { .name = "rx", .dma_req = 54, },
- { .name = "tx", .dma_req = 53, },
- { .dma_req = -1 }
-};
-
-struct omap_hwmod_dma_info omap2_i2c1_sdma_reqs[] = {
- { .name = "tx", .dma_req = 27 },
- { .name = "rx", .dma_req = 28 },
- { .dma_req = -1 }
-};
-
-struct omap_hwmod_dma_info omap2_i2c2_sdma_reqs[] = {
- { .name = "tx", .dma_req = 29 },
- { .name = "rx", .dma_req = 30 },
- { .dma_req = -1 }
-};
-
-struct omap_hwmod_dma_info omap2_mcspi1_sdma_reqs[] = {
- { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */
- { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */
- { .name = "tx1", .dma_req = 37 }, /* DMA_SPI1_TX1 */
- { .name = "rx1", .dma_req = 38 }, /* DMA_SPI1_RX1 */
- { .name = "tx2", .dma_req = 39 }, /* DMA_SPI1_TX2 */
- { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */
- { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */
- { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */
- { .dma_req = -1 }
-};
-
-struct omap_hwmod_dma_info omap2_mcspi2_sdma_reqs[] = {
- { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */
- { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */
- { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */
- { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */
- { .dma_req = -1 }
-};
-
-struct omap_hwmod_dma_info omap2_mcbsp1_sdma_reqs[] = {
- { .name = "rx", .dma_req = 32 },
- { .name = "tx", .dma_req = 31 },
- { .dma_req = -1 }
-};
-
-struct omap_hwmod_dma_info omap2_mcbsp2_sdma_reqs[] = {
- { .name = "rx", .dma_req = 34 },
- { .name = "tx", .dma_req = 33 },
- { .dma_req = -1 }
-};
-
-struct omap_hwmod_dma_info omap2_mcbsp3_sdma_reqs[] = {
- { .name = "rx", .dma_req = 18 },
- { .name = "tx", .dma_req = 17 },
- { .dma_req = -1 }
-};
-
-/* Other IP block data */
-
-
/*
* omap_hwmod class data
*/
struct omap_hwmod_class l3_hwmod_class = {
- .name = "l3"
+ .name = "l3",
};
struct omap_hwmod_class l4_hwmod_class = {
- .name = "l4"
+ .name = "l4",
};
struct omap_hwmod_class mpu_hwmod_class = {
- .name = "mpu"
+ .name = "mpu",
};
struct omap_hwmod_class iva_hwmod_class = {
- .name = "iva"
+ .name = "iva",
};
/* Common MPU IRQ line data */
-struct omap_hwmod_irq_info omap2_timer1_mpu_irqs[] = {
- { .irq = 37 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
-struct omap_hwmod_irq_info omap2_timer2_mpu_irqs[] = {
- { .irq = 38 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
-struct omap_hwmod_irq_info omap2_timer3_mpu_irqs[] = {
- { .irq = 39 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
-struct omap_hwmod_irq_info omap2_timer4_mpu_irqs[] = {
- { .irq = 40 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
-struct omap_hwmod_irq_info omap2_timer5_mpu_irqs[] = {
- { .irq = 41 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
-struct omap_hwmod_irq_info omap2_timer6_mpu_irqs[] = {
- { .irq = 42 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
-struct omap_hwmod_irq_info omap2_timer7_mpu_irqs[] = {
- { .irq = 43 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
-struct omap_hwmod_irq_info omap2_timer8_mpu_irqs[] = {
- { .irq = 44 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
-struct omap_hwmod_irq_info omap2_timer9_mpu_irqs[] = {
- { .irq = 45 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
-struct omap_hwmod_irq_info omap2_timer10_mpu_irqs[] = {
- { .irq = 46 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
-struct omap_hwmod_irq_info omap2_timer11_mpu_irqs[] = {
- { .irq = 47 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
-struct omap_hwmod_irq_info omap2_uart1_mpu_irqs[] = {
- { .irq = 72 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
-struct omap_hwmod_irq_info omap2_uart2_mpu_irqs[] = {
- { .irq = 73 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
-struct omap_hwmod_irq_info omap2_uart3_mpu_irqs[] = {
- { .irq = 74 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
struct omap_hwmod_irq_info omap2_dispc_irqs[] = {
{ .irq = 25 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
-struct omap_hwmod_irq_info omap2_i2c1_mpu_irqs[] = {
- { .irq = 56 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
-struct omap_hwmod_irq_info omap2_i2c2_mpu_irqs[] = {
- { .irq = 57 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
-struct omap_hwmod_irq_info omap2_gpio1_irqs[] = {
- { .irq = 29 + OMAP_INTC_START, }, /* INT_24XX_GPIO_BANK1 */
- { .irq = -1 },
-};
-
-struct omap_hwmod_irq_info omap2_gpio2_irqs[] = {
- { .irq = 30 + OMAP_INTC_START, }, /* INT_24XX_GPIO_BANK2 */
- { .irq = -1 },
-};
-
-struct omap_hwmod_irq_info omap2_gpio3_irqs[] = {
- { .irq = 31 + OMAP_INTC_START, }, /* INT_24XX_GPIO_BANK3 */
- { .irq = -1 },
-};
-
-struct omap_hwmod_irq_info omap2_gpio4_irqs[] = {
- { .irq = 32 + OMAP_INTC_START, }, /* INT_24XX_GPIO_BANK4 */
- { .irq = -1 },
+ { .irq = -1, },
};
struct omap_hwmod_irq_info omap2_dma_system_irqs[] = {
@@ -250,17 +77,7 @@ struct omap_hwmod_irq_info omap2_dma_system_irqs[] = {
{ .name = "1", .irq = 13 + OMAP_INTC_START, }, /* INT_24XX_SDMA_IRQ1 */
{ .name = "2", .irq = 14 + OMAP_INTC_START, }, /* INT_24XX_SDMA_IRQ2 */
{ .name = "3", .irq = 15 + OMAP_INTC_START, }, /* INT_24XX_SDMA_IRQ3 */
- { .irq = -1 },
-};
-
-struct omap_hwmod_irq_info omap2_mcspi1_mpu_irqs[] = {
- { .irq = 65 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
-struct omap_hwmod_irq_info omap2_mcspi2_mpu_irqs[] = {
- { .irq = 66 + OMAP_INTC_START, },
- { .irq = -1 },
+ { .irq = -1, },
};
struct omap_hwmod_class_sysconfig omap2_hdq1w_sysc = {
@@ -277,9 +94,3 @@ struct omap_hwmod_class omap2_hdq1w_class = {
.sysc = &omap2_hdq1w_sysc,
.reset = &omap_hdq1w_reset,
};
-
-struct omap_hwmod_irq_info omap2_hdq1w_mpu_irqs[] = {
- { .irq = 58 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-