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authorSylver Bruneau <sylver.bruneau@googlemail.com>2008-06-26 10:47:45 +0200
committerWim Van Sebroeck <wim@iguana.be>2008-10-10 13:14:17 +0000
commit22ac92322c83334b562024414b770e48927ae963 (patch)
tree0d0686491ec9559c3318f2ee8301c52a7555d702 /arch/arm/mach-orion5x/include
parentb3112180fe0b8dd80053d1d83e6fc421a266e47a (diff)
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[WATCHDOG] Orion: add hardware watchdog support
This patch allows the use of the hardware watchdog in the Marvell Orion series of ARM SoCs. Signed-off-by: Sylver Bruneau <sylver.bruneau@googlemail.com> Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
Diffstat (limited to 'arch/arm/mach-orion5x/include')
-rw-r--r--arch/arm/mach-orion5x/include/mach/orion5x.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-orion5x/include/mach/orion5x.h b/arch/arm/mach-orion5x/include/mach/orion5x.h
index 61eb74a88862..615cc1d08187 100644
--- a/arch/arm/mach-orion5x/include/mach/orion5x.h
+++ b/arch/arm/mach-orion5x/include/mach/orion5x.h
@@ -153,9 +153,11 @@
#define CPU_CONF ORION5X_BRIDGE_REG(0x100)
#define CPU_CTRL ORION5X_BRIDGE_REG(0x104)
#define CPU_RESET_MASK ORION5X_BRIDGE_REG(0x108)
+#define WDT_RESET 0x0002
#define CPU_SOFT_RESET ORION5X_BRIDGE_REG(0x10c)
#define POWER_MNG_CTRL_REG ORION5X_BRIDGE_REG(0x11C)
#define BRIDGE_CAUSE ORION5X_BRIDGE_REG(0x110)
+#define WDT_INT_REQ 0x0008
#define BRIDGE_MASK ORION5X_BRIDGE_REG(0x114)
#define BRIDGE_INT_TIMER0 0x0002
#define BRIDGE_INT_TIMER1 0x0004