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authorCatalin Marinas <catalin.marinas@arm.com>2010-07-01 13:21:47 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-07-02 10:10:09 +0100
commit2503a5ecd86c002506001eba432c524ea009fe7f (patch)
tree02f4646b29de1194154db5bd387298c222ffaf59 /arch/arm/mach-realview/include
parent00952d8f14447fccfb9560d98999f7489d4fd2df (diff)
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ARM: 6201/1: RealView: Do not use outer_sync() on ARM11MPCore boards with L220
RealView boards with certain revisions of the L220 cache controller (ARM11* processors only) may have issues (hardware deadlock) with the recent changes to the mb() barrier implementation (DSB followed by an L2 cache sync). The patch redefines the RealView ARM11MPCore mandatory barriers without the outer_sync() call. Cc: <stable@kernel.org> Tested-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-realview/include')
-rw-r--r--arch/arm/mach-realview/include/mach/barriers.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/mach-realview/include/mach/barriers.h b/arch/arm/mach-realview/include/mach/barriers.h
new file mode 100644
index 000000000000..0c5d749d7b5f
--- /dev/null
+++ b/arch/arm/mach-realview/include/mach/barriers.h
@@ -0,0 +1,8 @@
+/*
+ * Barriers redefined for RealView ARM11MPCore platforms with L220 cache
+ * controller to work around hardware errata causing the outer_sync()
+ * operation to deadlock the system.
+ */
+#define mb() dsb()
+#define rmb() dmb()
+#define wmb() mb()