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authorThor Thayer <tthayer@opensource.altera.com>2016-03-21 11:01:44 -0500
committerBorislav Petkov <bp@suse.de>2016-03-29 10:34:06 +0200
commit588cb03ea208b303e6dee7e916f329043fd0fc26 (patch)
treeacc1e591b446c8bee8016c33f6b7fbf8bf277b8c /arch/arm/mach-socfpga
parent8b39ab7290d571b91867b15c02a59edf0a5b00bb (diff)
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EDAC, altera: Add Arria10 L2 Cache ECC handling
Add a private data structure for Arria10 L2 cache ECC and the probe function for it. The Arria10 ECC device IRQs are in a shared register so the ECC Manager parent/child relationship requires a different probe function. Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Cc: devicetree@vger.kernel.org Cc: dinguyen@opensource.altera.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux@arm.linux.org.uk Cc: linux-edac <linux-edac@vger.kernel.org> Link: http://lkml.kernel.org/r/1458576106-24505-8-git-send-email-tthayer@opensource.altera.com Signed-off-by: Borislav Petkov <bp@suse.de>
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