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author | Catalin Marinas <catalin.marinas@arm.com> | 2010-03-24 16:48:53 +0100 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-03-25 21:13:50 +0000 |
commit | 23107c542068b2b94390aa333f6b330af64961e4 (patch) | |
tree | 8730f15e805ec2c02aaf6eac1780dcdbe22c2c04 /arch/arm/mm/Kconfig | |
parent | 319f551a0a167b49b5bbb4a9ff4802046a572bc5 (diff) | |
download | linux-23107c542068b2b94390aa333f6b330af64961e4.tar.gz linux-23107c542068b2b94390aa333f6b330af64961e4.tar.bz2 linux-23107c542068b2b94390aa333f6b330af64961e4.zip |
ARM: 5995/1: ARM: Add L2x0 outer_sync() support (3/4)
The L2x0 cache controllers need to explicitly drain their write buffer
even for Normal Noncacheable memory accesses.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm/Kconfig')
-rw-r--r-- | arch/arm/mm/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 88a24de55aaf..55a2a00db77f 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -763,6 +763,7 @@ config CACHE_L2X0 REALVIEW_EB_A9MP || ARCH_MX35 || ARCH_MX31 || MACH_REALVIEW_PBX || ARCH_NOMADIK || ARCH_OMAP4 default y select OUTER_CACHE + select OUTER_CACHE_SYNC help This option enables the L2x0 PrimeCell. |