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authorLinus Walleij <linus.walleij@linaro.org>2023-12-07 14:33:35 +0100
committerArnd Bergmann <arnd@arndb.de>2023-12-22 11:43:16 +0000
commit2560cffd2134c2e070dee369b37f6e55438087f9 (patch)
tree3064683cfe4bc2a7d36f4b72b93b87365a51e00f /arch/arm/mm/Kconfig
parent64704ef17d0e1f15e0a5b5eea66e4f531bfd6eec (diff)
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ARM: Delete ARM11MPCore (ARM11 ARMv6K SMP) support
This ARM11 SMP configuration was one of the first SMP configurations the ARM kernel supported, but it has the downside of odd DMA handling, odd cache tagging, and often (as of recent) completely broken cache handling on the ARM RealView PB11MPCore test chips. To boot the platform it was necessary to completely disable the cache. When it comes to the EB 11MPCore it is unclear if this ever worked. These reference designs are now the only ARMv6K SMP platforms. As only reference designs of purely academic interest remain, and since the special-cased DMA and PMU code is hard to maintain and doesn't really work, it is not really worth our time. Delete the ARM11MPCore support along with: - The special DMA quirk CONFIG_DMA_CACHE_RWFO that is only used on ARMv6K SMP, and we are the last ARMV6K system leaving the building and the cache handling is awkward, so good-bye. - The special PMU handling that was only used by ARM11MPCore. The following is left behind: - TIMER_OF_DECLARE(arm_twd_11mp, "arm,arm11mp-twd-timer", ...) in arch/arm/kernel/smp_twd.c, this is still in use by Marvell MMP3 arch/arm/boot/dts/marvell/mmp3.dtsi - IRQCHIP_DECLARE(arm11mp_gic, "arm,arm11mp-gic", ...) in drivers/irqchip/irq-gic.c, this is still in use by Marvell MMP3 arch/arm/boot/dts/marvell/mmp3.dtsi - A compatible for the arm11mpcore SCU, since this was mistakedly used for the Cortex-A9 version of RealView EB. These are unfortunate but will need to be kept around for compatibility. New Marvell-specific compatibles should however probably be added. Acked-by: Mark Rutland <mark.rutland@arm.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Link: https://lore.kernel.org/r/20231207-drop-11mpcore-v2-1-560b396f3bf5@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mm/Kconfig')
-rw-r--r--arch/arm/mm/Kconfig18
1 files changed, 0 insertions, 18 deletions
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index c164cde50243..2b6f50dd5478 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -937,24 +937,6 @@ config VDSO
You must have glibc 2.22 or later for programs to seamlessly
take advantage of this.
-config DMA_CACHE_RWFO
- bool "Enable read/write for ownership DMA cache maintenance"
- depends on CPU_V6K && SMP
- default y
- help
- The Snoop Control Unit on ARM11MPCore does not detect the
- cache maintenance operations and the dma_{map,unmap}_area()
- functions may leave stale cache entries on other CPUs. By
- enabling this option, Read or Write For Ownership in the ARMv6
- DMA cache maintenance functions is performed. These LDR/STR
- instructions change the cache line state to shared or modified
- so that the cache operation has the desired effect.
-
- Note that the workaround is only valid on processors that do
- not perform speculative loads into the D-cache. For such
- processors, if cache maintenance operations are not broadcast
- in hardware, other workarounds are needed (e.g. cache
- maintenance broadcasting in software via FIQ).
config OUTER_CACHE
bool