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| author | Ondrej Jirman <megous@megous.com> | 2019-10-07 22:31:52 +0200 |
|---|---|---|
| committer | Maxime Ripard <mripard@kernel.org> | 2019-10-08 07:57:54 +0200 |
| commit | 351170463471d2037aa034625d05f185e6d85f80 (patch) | |
| tree | 98d98153ff6a0480d8c28701004a555289a3bdf3 /arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts | |
| parent | cd380e0d00b2b21506f9319a626b6205e9d64aae (diff) | |
| download | linux-351170463471d2037aa034625d05f185e6d85f80.tar.gz linux-351170463471d2037aa034625d05f185e6d85f80.tar.bz2 linux-351170463471d2037aa034625d05f185e6d85f80.zip | |
arm64: dts: allwinner: orange-pi-3: Enable UART1 / Bluetooth
The board contains AP6256 WiFi/BT module that has its bluetooth part
connected to SoC's UART1 port. Enable this port, and add node for the
bluetooth device.
Bluetooth part is named bcm4345c5.
You'll need a BCM4345C5.hcd firmware file that can be found in the
Xulongs's repository for H6:
https://github.com/orangepi-xunlong/OrangePiH6_external/tree/master/ap6256
The driver expects the firmware at the following path relative to the
firmware directory:
brcm/BCM4345C5.hcd
Signed-off-by: Ondrej Jirman <megous@megous.com>
Signed-off-by: Maxime Ripard <mripard@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts')
| -rw-r--r-- | arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts index eb379cd402ac..2557cc6c8d50 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts @@ -15,6 +15,7 @@ aliases { serial0 = &uart0; + serial1 = &uart1; }; chosen { @@ -269,6 +270,24 @@ status = "okay"; }; +/* There's the BT part of the AP6256 connected to that UART */ +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; + uart-has-rtscts; + status = "okay"; + + bluetooth { + compatible = "brcm,bcm4345c5"; + clocks = <&rtc 1>; + clock-names = "lpo"; + device-wakeup-gpios = <&r_pio 1 2 GPIO_ACTIVE_HIGH>; /* PM2 */ + host-wakeup-gpios = <&r_pio 1 1 GPIO_ACTIVE_HIGH>; /* PM1 */ + shutdown-gpios = <&r_pio 1 4 GPIO_ACTIVE_HIGH>; /* PM4 */ + max-speed = <1500000>; + }; +}; + &usb2otg { /* * This board doesn't have a controllable VBUS even though it |