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| author | Fei Shao <fshao@chromium.org> | 2024-09-11 22:33:58 +0800 |
|---|---|---|
| committer | AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> | 2024-10-02 11:26:24 +0200 |
| commit | 41eb8f7ad206948d7ac952db78c075f1f903476c (patch) | |
| tree | 3a52277ad66408ddc9369326bba0cb7d3b2a715b /arch/arm64/boot/dts/mediatek | |
| parent | 43fc1bd08e5bc50d48f17ef8d9164bb0bf605578 (diff) | |
| download | linux-41eb8f7ad206948d7ac952db78c075f1f903476c.tar.gz linux-41eb8f7ad206948d7ac952db78c075f1f903476c.tar.bz2 linux-41eb8f7ad206948d7ac952db78c075f1f903476c.zip | |
arm64: dts: mediatek: mt8188: Add PWM nodes for display backlight
Add two hardware PWM nodes for display backlight usage on MT8188 SoC,
and mark them as disabled by default.
Boards can enable the necessary PWM node as needed.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Fei Shao <fshao@chromium.org>
Link: https://lore.kernel.org/r/20240911143429.850071-6-fshao@chromium.org
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Diffstat (limited to 'arch/arm64/boot/dts/mediatek')
| -rw-r--r-- | arch/arm64/boot/dts/mediatek/mt8188.dtsi | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt8188.dtsi b/arch/arm64/boot/dts/mediatek/mt8188.dtsi index f431c3037493..25a048893f11 100644 --- a/arch/arm64/boot/dts/mediatek/mt8188.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8188.dtsi @@ -1421,6 +1421,28 @@ #thermal-sensor-cells = <1>; }; + disp_pwm0: pwm@1100e000 { + compatible = "mediatek,mt8188-disp-pwm", "mediatek,mt8183-disp-pwm"; + reg = <0 0x1100e000 0 0x1000>; + clocks = <&topckgen CLK_TOP_DISP_PWM0>, + <&infracfg_ao CLK_INFRA_AO_DISP_PWM>; + clock-names = "main", "mm"; + interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 0>; + #pwm-cells = <2>; + status = "disabled"; + }; + + disp_pwm1: pwm@1100f000 { + compatible = "mediatek,mt8188-disp-pwm", "mediatek,mt8183-disp-pwm"; + reg = <0 0x1100f000 0 0x1000>; + clocks = <&topckgen CLK_TOP_DISP_PWM1>, + <&infracfg_ao CLK_INFRA_AO_DISP_PWM1>; + clock-names = "main", "mm"; + interrupts = <GIC_SPI 793 IRQ_TYPE_LEVEL_HIGH 0>; + #pwm-cells = <2>; + status = "disabled"; + }; + spi1: spi@11010000 { compatible = "mediatek,mt8188-spi-ipm", "mediatek,spi-ipm"; #address-cells = <1>; |