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| author | Shawn Guo <shawn.guo@linaro.org> | 2021-03-03 11:31:03 +0800 |
|---|---|---|
| committer | Bjorn Andersson <bjorn.andersson@linaro.org> | 2021-03-11 20:22:43 -0600 |
| commit | 02058fc3839df65ff64de2a6b1c5de8c9fd705c1 (patch) | |
| tree | 9ff5683c3ab9df95b136b4b7ef34c6ced0f14d93 /arch/arm64/boot/dts/qcom | |
| parent | 1608784b6129c8bbb4744b3b3e01c07c9d5a7f8d (diff) | |
| download | linux-02058fc3839df65ff64de2a6b1c5de8c9fd705c1.tar.gz linux-02058fc3839df65ff64de2a6b1c5de8c9fd705c1.tar.bz2 linux-02058fc3839df65ff64de2a6b1c5de8c9fd705c1.zip | |
arm64: dts: qcom: sdm845: fix number of pins in 'gpio-ranges'
The last cell of 'gpio-ranges' should be number of GPIO pins, and in
case of qcom platform it should match msm_pinctrl_soc_data.ngpio rather
than msm_pinctrl_soc_data.ngpio - 1.
This fixes the problem that when the last GPIO pin in the range is
configured with the following call sequence, it always fails with
-EPROBE_DEFER.
pinctrl_gpio_set_config()
pinctrl_get_device_gpio_range()
pinctrl_match_gpio_range()
Fixes: bc2c806293c6 ("arm64: dts: qcom: sdm845: Add gpio-ranges to TLMM node")
Cc: Evan Green <evgreen@chromium.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20210303033106.549-2-shawn.guo@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Diffstat (limited to 'arch/arm64/boot/dts/qcom')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 8acc731b58a3..874990522b42 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -2382,7 +2382,7 @@ #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; - gpio-ranges = <&tlmm 0 0 150>; + gpio-ranges = <&tlmm 0 0 151>; wakeup-parent = <&pdc_intc>; cci0_default: cci0-default { |