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authorGeert Uytterhoeven <geert+renesas@glider.be>2020-02-18 14:30:18 +0100
committerGeert Uytterhoeven <geert+renesas@glider.be>2020-02-21 14:41:36 +0100
commitd745c72da921acdf38d68681d5fc2ff113b78f55 (patch)
tree84599f841246fe5bae708494fa106015566bbb4d /arch/arm64/boot/dts/renesas/r8a77990.dtsi
parent361c5dbb446eedcb1367f1bf50f32ed4d8d4cc3b (diff)
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arm64: dts: renesas: rcar-gen3: Add reset control properties for display
Add reset control properties to the device nodes for the Display Units on all supported R-Car Gen3 SoCs. Note that on these SoCs, there is only a single reset for each pair of DU channels. The display nodes on R-Car V3M and V3H already had "resets" properties, but lacked the corresponding "reset-names" properties. Join the clocks lines while at it, to increase uniformity. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/20200218133019.22299-4-geert+renesas@glider.be
Diffstat (limited to 'arch/arm64/boot/dts/renesas/r8a77990.dtsi')
-rw-r--r--arch/arm64/boot/dts/renesas/r8a77990.dtsi3
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
index c05ee98043b2..0ad20b78e6eb 100644
--- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
@@ -1793,8 +1793,7 @@
reg = <0 0xfeb00000 0 0x40000>;
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 724>,
- <&cpg CPG_MOD 723>;
+ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
clock-names = "du.0", "du.1";
resets = <&cpg 724>;
reset-names = "du.0";