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| author | Michael Riesch <michael.riesch@wolfvision.net> | 2022-07-12 15:32:03 +0200 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2022-08-29 12:55:19 +0200 |
| commit | 7a3eabdcd0fdc344d31b18e78e4f4b5d94db8df5 (patch) | |
| tree | aa3df067f4e8ea5bc72097e079e391d0fc8af395 /arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts | |
| parent | 2fd8bd005897436c5a6d2d150d7b1ae2907f8b06 (diff) | |
| download | linux-7a3eabdcd0fdc344d31b18e78e4f4b5d94db8df5.tar.gz linux-7a3eabdcd0fdc344d31b18e78e4f4b5d94db8df5.tar.bz2 linux-7a3eabdcd0fdc344d31b18e78e4f4b5d94db8df5.zip | |
arm64: dts: rockchip: add vcc_mipi regulator to rock-3a
The Radxa ROCK3 Model A features a voltage regulator that provides
a 3V3 supply to the MIPI DSI connector. Add this regulator to the
device tree of the board.
Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20220712133204.2524942-2-michael.riesch@wolfvision.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts')
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts index a848a2a2ab68..e883afa83617 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts @@ -147,6 +147,22 @@ regulator-off-in-suspend; }; }; + + vcc_mipi: vcc-mipi { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc_mipi_en>; + regulator-name = "vcc_mipi"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc3v3_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; }; &combphy0 { @@ -484,6 +500,12 @@ }; }; + display { + vcc_mipi_en: vcc_mipi_en { + rockchip,pins = <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + ethernet { eth_phy_rst: eth_phy_rst { rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; |