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| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2020-01-16 21:50:45 +0900 |
|---|---|---|
| committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2020-01-18 00:56:18 +0900 |
| commit | e98d5023fe1f062bb549354a2428d930775fd67e (patch) | |
| tree | ae69afd607e6fc3c6dad246bf92883375df1e9ea /arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | |
| parent | e42617b825f8073569da76dc4510bfa019b1c35a (diff) | |
| download | linux-e98d5023fe1f062bb549354a2428d930775fd67e.tar.gz linux-e98d5023fe1f062bb549354a2428d930775fd67e.tar.bz2 linux-e98d5023fe1f062bb549354a2428d930775fd67e.zip | |
arm64: dts: uniphier: add reset-names to NAND controller node
The Denali NAND controller IP has separate reset control for the
controller core and registers.
Add the reset-names, and one more phandle accordingly. This is the
approved DT-binding.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi index b658f2b641e2..f2dc5f695020 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi @@ -937,7 +937,8 @@ pinctrl-0 = <&pinctrl_nand>; clock-names = "nand", "nand_x", "ecc"; clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>; - resets = <&sys_rst 2>; + reset-names = "nand", "reg"; + resets = <&sys_rst 2>, <&sys_rst 2>; }; }; }; |