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| author | Suman Anna <s-anna@ti.com> | 2019-06-05 11:34:33 -0500 |
|---|---|---|
| committer | Tero Kristo <t-kristo@ti.com> | 2019-06-19 11:59:49 +0300 |
| commit | 78eccc2ac98e4166def294f02283f21cefd89591 (patch) | |
| tree | c9d7884bc301d180f4c39924fc7de8a2686236e0 /arch/arm64/boot/dts/ti | |
| parent | ae7d8505b10d983a1da5dc6e507c57b0f384f2ec (diff) | |
| download | linux-78eccc2ac98e4166def294f02283f21cefd89591.tar.gz linux-78eccc2ac98e4166def294f02283f21cefd89591.tar.bz2 linux-78eccc2ac98e4166def294f02283f21cefd89591.zip | |
arm64: dts: ti: k3-j721e: Add the MCU SRAM node
Add the on-chip SRAM present within the MCU domain as a mmio-sram node.
The K3 J721E SoCs have 1 MB of such memory. Any specific memory range
within this RAM needed by a driver/software module ought to be reserved
using an appropriate child node.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Diffstat (limited to 'arch/arm64/boot/dts/ti')
| -rw-r--r-- | arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi index 285f5b4412eb..07b58eeebceb 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi @@ -43,6 +43,14 @@ pinctrl-single,function-mask = <0xffffffff>; }; + mcu_ram: sram@41c00000 { + compatible = "mmio-sram"; + reg = <0x00 0x41c00000 0x00 0x100000>; + ranges = <0x0 0x00 0x41c00000 0x100000>; + #address-cells = <1>; + #size-cells = <1>; + }; + wkup_uart0: serial@42300000 { compatible = "ti,j721e-uart", "ti,am654-uart"; reg = <0x00 0x42300000 0x00 0x100>; |