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authorNĂ­colas F. R. A. Prado <nfraprado@collabora.com>2024-10-18 11:19:02 -0400
committerAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>2024-10-21 15:44:55 +0200
commitb666eb393d757090d5bfca86cda3126a93614ccb (patch)
tree3a4a214491dd7666e299b07849362d2506fdc120 /arch/arm64/boot
parentd279c73576a7ce87f2f7ba510311c3c53ded11ea (diff)
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arm64: dts: mediatek: mt8188: Add ethernet node
Describe the ethernet present on the MT8188. [Cleaned up to pass dtbs_check, follow DTS style guidelines, removed hardcoded mac address and split between mt8188 and genio700 commits, and addressed further feedback from the mailing list] Signed-off-by: Jianguo Zhang <jianguo.zhang@mediatek.com> Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com> Signed-off-by: Hsuan-Yu Lin <shane.lin@canonical.com> Signed-off-by: NĂ­colas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20241018-genio700-eth-v2-1-f3c73b85507b@collabora.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Diffstat (limited to 'arch/arm64/boot')
-rw-r--r--arch/arm64/boot/dts/mediatek/mt8188.dtsi97
1 files changed, 97 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt8188.dtsi b/arch/arm64/boot/dts/mediatek/mt8188.dtsi
index 2710e18ce696..5522f1648fd2 100644
--- a/arch/arm64/boot/dts/mediatek/mt8188.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8188.dtsi
@@ -1647,6 +1647,103 @@
status = "disabled";
};
+ eth: ethernet@11021000 {
+ compatible = "mediatek,mt8188-gmac", "mediatek,mt8195-gmac",
+ "snps,dwmac-5.10a";
+ reg = <0 0x11021000 0 0x4000>;
+ interrupts = <GIC_SPI 716 IRQ_TYPE_LEVEL_HIGH 0>;
+ interrupt-names = "macirq";
+ clocks = <&pericfg_ao CLK_PERI_AO_ETHERNET>,
+ <&pericfg_ao CLK_PERI_AO_ETHERNET_BUS>,
+ <&topckgen CLK_TOP_SNPS_ETH_250M>,
+ <&topckgen CLK_TOP_SNPS_ETH_62P4M_PTP>,
+ <&topckgen CLK_TOP_SNPS_ETH_50M_RMII>,
+ <&pericfg_ao CLK_PERI_AO_ETHERNET_MAC>;
+ clock-names = "axi", "apb", "mac_main", "ptp_ref",
+ "rmii_internal", "mac_cg";
+ assigned-clocks = <&topckgen CLK_TOP_SNPS_ETH_250M>,
+ <&topckgen CLK_TOP_SNPS_ETH_62P4M_PTP>,
+ <&topckgen CLK_TOP_SNPS_ETH_50M_RMII>;
+ assigned-clock-parents = <&topckgen CLK_TOP_ETHPLL_D2>,
+ <&topckgen CLK_TOP_ETHPLL_D8>,
+ <&topckgen CLK_TOP_ETHPLL_D10>;
+ power-domains = <&spm MT8188_POWER_DOMAIN_ETHER>;
+ mediatek,pericfg = <&infracfg_ao>;
+ snps,axi-config = <&stmmac_axi_setup>;
+ snps,mtl-rx-config = <&mtl_rx_setup>;
+ snps,mtl-tx-config = <&mtl_tx_setup>;
+ snps,txpbl = <16>;
+ snps,rxpbl = <16>;
+ snps,clk-csr = <0>;
+ status = "disabled";
+
+ eth_mdio: mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ stmmac_axi_setup: stmmac-axi-config {
+ snps,blen = <0 0 0 0 16 8 4>;
+ snps,rd_osr_lmt = <0x7>;
+ snps,wr_osr_lmt = <0x7>;
+ };
+
+ mtl_rx_setup: rx-queues-config {
+ snps,rx-queues-to-use = <4>;
+ snps,rx-sched-sp;
+
+ queue0 {
+ snps,dcb-algorithm;
+ snps,map-to-dma-channel = <0x0>;
+ };
+
+ queue1 {
+ snps,dcb-algorithm;
+ snps,map-to-dma-channel = <0x0>;
+ };
+
+ queue2 {
+ snps,dcb-algorithm;
+ snps,map-to-dma-channel = <0x0>;
+ };
+
+ queue3 {
+ snps,dcb-algorithm;
+ snps,map-to-dma-channel = <0x0>;
+ };
+ };
+
+ mtl_tx_setup: tx-queues-config {
+ snps,tx-queues-to-use = <4>;
+ snps,tx-sched-wrr;
+
+ queue0 {
+ snps,dcb-algorithm;
+ snps,priority = <0x0>;
+ snps,weight = <0x10>;
+ };
+
+ queue1 {
+ snps,dcb-algorithm;
+ snps,priority = <0x1>;
+ snps,weight = <0x11>;
+ };
+
+ queue2 {
+ snps,dcb-algorithm;
+ snps,priority = <0x2>;
+ snps,weight = <0x12>;
+ };
+
+ queue3 {
+ snps,dcb-algorithm;
+ snps,priority = <0x3>;
+ snps,weight = <0x13>;
+ };
+ };
+ };
+
xhci1: usb@11200000 {
compatible = "mediatek,mt8188-xhci", "mediatek,mtk-xhci";
reg = <0 0x11200000 0 0x1000>,