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author | Marc Zyngier <maz@kernel.org> | 2018-12-22 12:00:10 +0000 |
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committer | Marc Zyngier <maz@kernel.org> | 2020-07-07 09:27:14 +0100 |
commit | 552ae76face5584085845646c5f57e10c1a4ebdc (patch) | |
tree | 9b00fd515e081c3d7230e2ee29aa0eb5ed18073e /arch/arm64/include/asm/sysreg.h | |
parent | 9ebcfadb0610322ac537dd7aa5d9cbc2b2894c68 (diff) | |
download | linux-552ae76face5584085845646c5f57e10c1a4ebdc.tar.gz linux-552ae76face5584085845646c5f57e10c1a4ebdc.tar.bz2 linux-552ae76face5584085845646c5f57e10c1a4ebdc.zip |
arm64: Detect the ARMv8.4 TTL feature
In order to reduce the cost of TLB invalidation, the ARMv8.4 TTL
feature allows TLBs to be issued with a level allowing for quicker
invalidation.
Let's detect the feature for now. Further patches will implement
its actual usage.
Reviewed-by : Suzuki K Polose <suzuki.poulose@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Diffstat (limited to 'arch/arm64/include/asm/sysreg.h')
-rw-r--r-- | arch/arm64/include/asm/sysreg.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 463175f80341..8c209aa17273 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -746,6 +746,7 @@ /* id_aa64mmfr2 */ #define ID_AA64MMFR2_E0PD_SHIFT 60 +#define ID_AA64MMFR2_TTL_SHIFT 48 #define ID_AA64MMFR2_FWB_SHIFT 40 #define ID_AA64MMFR2_AT_SHIFT 32 #define ID_AA64MMFR2_LVA_SHIFT 16 |