| Commit message (Expand) | Author | Age | Files | Lines |
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| * | Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm6... | Linus Torvalds | 2020-12-02 | 1 | -1/+1 |
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| | * | arm64: mte: Fix typo in macro definition | Vincenzo Frascino | 2020-11-30 | 1 | -1/+1 |
| * | | Merge tag 'kvmarm-fixes-5.10-3' of git://git.kernel.org/pub/scm/linux/kernel/... | Paolo Bonzini | 2020-11-13 | 1 | -0/+4 |
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| | * | KVM: arm64: Handle SCXTNUM_ELx traps | Marc Zyngier | 2020-11-12 | 1 | -0/+4 |
| * | | arm64: Add workaround for Arm Cortex-A77 erratum 1508412 | Rob Herring | 2020-10-29 | 1 | -0/+9 |
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| * | Merge branch 'for-next/mte' into for-next/core | Will Deacon | 2020-10-02 | 1 | -0/+61 |
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| | * | arm64: mte: Allow user control of the generated random tags via prctl() | Catalin Marinas | 2020-09-04 | 1 | -0/+7 |
| | * | arm64: mte: CPU feature detection and initial sysreg configuration | Vincenzo Frascino | 2020-09-03 | 1 | -0/+1 |
| | * | arm64: mte: system register definitions | Vincenzo Frascino | 2020-09-03 | 1 | -0/+53 |
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| *-. \ | Merge branches 'for-next/acpi', 'for-next/boot', 'for-next/bpf', 'for-next/cp... | Will Deacon | 2020-10-02 | 1 | -8/+18 |
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| | | * | arm64: ptrauth: Introduce Armv8.3 pointer authentication enhancements | Amit Daniel Kachhap | 2020-09-14 | 1 | -8/+16 |
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| | * | arm64: perf: Add support caps under sysfs | Shaokun Zhang | 2020-09-28 | 1 | -0/+2 |
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| * | Merge branch 'for-next/tlbi' into for-next/core | Catalin Marinas | 2020-07-31 | 1 | -0/+3 |
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| | * | arm64: tlb: Detect the ARMv8.4 TLBI RANGE feature | Zhenyu Ye | 2020-07-15 | 1 | -0/+3 |
| | * | arm64: Detect the ARMv8.4 TTL feature | Marc Zyngier | 2020-07-07 | 1 | -0/+1 |
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| *-. \ | Merge branches 'for-next/misc', 'for-next/vmcoreinfo', 'for-next/cpufeature',... | Catalin Marinas | 2020-07-31 | 1 | -0/+42 |
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| | | * | arm64/cpufeature: Replace all open bits shift encodings with macros | Anshuman Khandual | 2020-07-03 | 1 | -0/+28 |
| | | * | arm64/cpufeature: Add remaining feature bits in ID_AA64MMFR2 register | Anshuman Khandual | 2020-07-03 | 1 | -0/+7 |
| | | * | arm64/cpufeature: Add remaining feature bits in ID_AA64MMFR1 register | Anshuman Khandual | 2020-07-03 | 1 | -0/+4 |
| | | * | arm64/cpufeature: Add remaining feature bits in ID_AA64MMFR0 register | Anshuman Khandual | 2020-07-03 | 1 | -0/+3 |
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| * / | arm64: s/AMEVTYPE/AMEVTYPER | Vladimir Murzin | 2020-07-22 | 1 | -2/+2 |
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| * | Merge branch 'for-next/bti' into for-next/core | Will Deacon | 2020-05-28 | 1 | -0/+3 |
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| | * | Merge branch 'for-next/bti-user' into for-next/bti | Will Deacon | 2020-05-05 | 1 | -0/+4 |
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| | | * | arm64: Basic Branch Target Identification support | Dave Martin | 2020-03-16 | 1 | -0/+4 |
| * | | | KVM: arm64: Check advertised Stage-2 page size capability | Marc Zyngier | 2020-05-28 | 1 | -0/+3 |
| * | | | arm64/cpufeature: Add remaining feature bits in ID_AA64PFR1 register | Anshuman Khandual | 2020-05-21 | 1 | -0/+4 |
| * | | | arm64/cpufeature: Add remaining feature bits in ID_AA64PFR0 register | Anshuman Khandual | 2020-05-21 | 1 | -0/+2 |
| * | | | arm64/cpufeature: Add remaining feature bits in ID_AA64ISAR0 register | Anshuman Khandual | 2020-05-21 | 1 | -0/+1 |
| * | | | arm64/cpufeature: Add remaining feature bits in ID_MMFR4 register | Anshuman Khandual | 2020-05-21 | 1 | -0/+8 |
| * | | | arm64/cpufeature: Add remaining feature bits in ID_PFR0 register | Anshuman Khandual | 2020-05-21 | 1 | -0/+3 |
| * | | | arm64/cpufeature: Introduce ID_MMFR5 CPU register | Anshuman Khandual | 2020-05-21 | 1 | -0/+3 |
| * | | | arm64/cpufeature: Introduce ID_DFR1 CPU register | Anshuman Khandual | 2020-05-21 | 1 | -0/+3 |
| * | | | arm64/cpufeature: Introduce ID_PFR2 CPU register | Anshuman Khandual | 2020-05-21 | 1 | -0/+4 |
| * | | | arm64/cpufeature: Add explicit ftr_id_isar0[] for ID_ISAR0 register | Anshuman Khandual | 2020-05-21 | 1 | -0/+8 |
| * | | | arm64: cpufeature: Group indexed system register definitions by name | Will Deacon | 2020-05-05 | 1 | -1/+5 |
| * | | | arm64: drop duplicate definitions of ID_AA64MMFR0_TGRAN constants | Ard Biesheuvel | 2020-04-28 | 1 | -11/+0 |
| * | | | arm64: cpufeature: Add CPU capability for AArch32 EL1 support | Will Deacon | 2020-04-28 | 1 | -0/+1 |
| * | | | arm64: cpufeature: Spell out register fields for ID_ISAR4 and ID_PFR1 | Will Deacon | 2020-04-28 | 1 | -0/+17 |
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| * | | arm64: Delete the space separator in __emit_inst | Fangrui Song | 2020-04-15 | 1 | -1/+3 |
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| *-. \ | Merge branches 'for-next/memory-hotremove', 'for-next/arm_sdei', 'for-next/am... | Catalin Marinas | 2020-03-25 | 1 | -0/+48 |
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| | | * | arm64: perf: Add support for ARMv8.5-PMU 64-bit counters | Andrew Murray | 2020-03-17 | 1 | -0/+4 |
| | | * | KVM: arm64: limit PMU version to PMUv3 for ARMv8.1 | Andrew Murray | 2020-03-17 | 1 | -0/+6 |
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| | * | arm64: add support for the AMU extension v1 | Ionela Voinescu | 2020-03-06 | 1 | -0/+38 |
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| * | Merge branch 'for-next/rng' into for-next/core | Will Deacon | 2020-01-22 | 1 | -0/+4 |
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| | * | arm64: Implement archrandom.h for ARMv8.5-RNG | Richard Henderson | 2020-01-22 | 1 | -0/+4 |
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| *---. \ | Merge branches 'for-next/acpi', 'for-next/cpufeatures', 'for-next/csum', 'for... | Will Deacon | 2020-01-22 | 1 | -0/+34 |
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| | | | * | arm64: Use macros instead of hard-coded constants for MAIR_EL1 | Catalin Marinas | 2020-01-17 | 1 | -0/+12 |
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| | | * | arm64: Add initial support for E0PD | Mark Brown | 2020-01-15 | 1 | -0/+1 |
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| | * | arm64: Introduce ID_ISAR6 CPU register | Anshuman Khandual | 2020-01-15 | 1 | -0/+9 |
| | * | arm64: cpufeature: Export matrix and other features to userspace | Steven Price | 2020-01-15 | 1 | -0/+12 |
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