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authorDave Martin <Dave.Martin@arm.com>2017-10-31 15:51:00 +0000
committerWill Deacon <will.deacon@arm.com>2017-11-03 15:24:13 +0000
commit672365649ccac68cf6fafecad1a7913951e7493b (patch)
treeee5c278cd742440cf4f08c742e2964f07d4c6a31 /arch/arm64/kernel/entry-fpsimd.S
parent9cf5b54fafedbc381df77c7f8d2aab61f4900657 (diff)
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arm64/sve: System register and exception syndrome definitions
The SVE architecture adds some system registers, ID register fields and a dedicated ESR exception class. This patch adds the appropriate definitions that will be needed by the kernel. Signed-off-by: Dave Martin <Dave.Martin@arm.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
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