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| author | Neeraj Upadhyay <quic_neeraju@quicinc.com> | 2023-04-25 15:27:00 +0530 |
|---|---|---|
| committer | Will Deacon <will@kernel.org> | 2023-04-26 09:01:04 +0100 |
| commit | 4e8f6e44bce8da3b0e2df37b12839f4bc9c9cabe (patch) | |
| tree | 7674a9cd6f13cc1fd61b87903651c13181c8e8ed /arch/arm64/kernel | |
| parent | eeb3557cc188e42ae7f7bef2d6dc5bf0e078412e (diff) | |
| download | linux-4e8f6e44bce8da3b0e2df37b12839f4bc9c9cabe.tar.gz linux-4e8f6e44bce8da3b0e2df37b12839f4bc9c9cabe.tar.bz2 linux-4e8f6e44bce8da3b0e2df37b12839f4bc9c9cabe.zip | |
arm64: Fix label placement in record_mmu_state()
Fix label so that pre_disable_mmu_workaround() is called
before clearing sctlr_el1.M.
Fixes: 2ced0f30a426 ("arm64: head: Switch endianness before populating the ID map")
Signed-off-by: Neeraj Upadhyay <quic_neeraju@quicinc.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Link: https://lore.kernel.org/r/20230425095700.22005-1-quic_neeraju@quicinc.com
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'arch/arm64/kernel')
| -rw-r--r-- | arch/arm64/kernel/head.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S index b98970907226..e92caebff46a 100644 --- a/arch/arm64/kernel/head.S +++ b/arch/arm64/kernel/head.S @@ -150,8 +150,8 @@ CPU_BE( tbz x19, #SCTLR_ELx_EE_SHIFT, 1f ) pre_disable_mmu_workaround msr sctlr_el2, x19 b 3f - pre_disable_mmu_workaround -2: msr sctlr_el1, x19 +2: pre_disable_mmu_workaround + msr sctlr_el1, x19 3: isb mov x19, xzr ret |