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author | Will Deacon <will.deacon@arm.com> | 2018-01-03 11:17:58 +0000 |
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committer | Catalin Marinas <catalin.marinas@arm.com> | 2018-01-08 18:45:25 +0000 |
commit | 0f15adbb2861ce6f75ccfc5a92b19eae0ef327d0 (patch) | |
tree | 918eadd8cc51a5c04e2c9d4e657a4fec8f4b29d4 /arch/arm64/mm/context.c | |
parent | 95e3de3590e3f2358bb13f013911bc1bfa5d3f53 (diff) | |
download | linux-0f15adbb2861ce6f75ccfc5a92b19eae0ef327d0.tar.gz linux-0f15adbb2861ce6f75ccfc5a92b19eae0ef327d0.tar.bz2 linux-0f15adbb2861ce6f75ccfc5a92b19eae0ef327d0.zip |
arm64: Add skeleton to harden the branch predictor against aliasing attacks
Aliasing attacks against CPU branch predictors can allow an attacker to
redirect speculative control flow on some CPUs and potentially divulge
information from one context to another.
This patch adds initial skeleton code behind a new Kconfig option to
enable implementation-specific mitigations against these attacks for
CPUs that are affected.
Co-developed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/mm/context.c')
-rw-r--r-- | arch/arm64/mm/context.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/mm/context.c b/arch/arm64/mm/context.c index 511bd1e79b69..ff99a880a730 100644 --- a/arch/arm64/mm/context.c +++ b/arch/arm64/mm/context.c @@ -249,6 +249,8 @@ asmlinkage void post_ttbr_update_workaround(void) "ic iallu; dsb nsh; isb", ARM64_WORKAROUND_CAVIUM_27456, CONFIG_CAVIUM_ERRATUM_27456)); + + arm64_apply_bp_hardening(); } static int asids_init(void) |