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| author | Will Deacon <will.deacon@arm.com> | 2015-10-06 18:46:26 +0100 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2015-10-07 11:56:21 +0100 |
| commit | 5a7862e83000ccfd36db927c6f060458fe271157 (patch) | |
| tree | 418e7e0fb2163f8fdc15026832cab1f65a7017ee /arch/arm64/mm/context.c | |
| parent | f3e002c24e1f3b66f6e392ecd6928b5d04672c54 (diff) | |
| download | linux-5a7862e83000ccfd36db927c6f060458fe271157.tar.gz linux-5a7862e83000ccfd36db927c6f060458fe271157.tar.bz2 linux-5a7862e83000ccfd36db927c6f060458fe271157.zip | |
arm64: tlbflush: avoid flushing when fullmm == 1
The TLB gather code sets fullmm=1 when tearing down the entire address
space for an mm_struct on exit or execve. Given that the ASID allocator
will never re-allocate a dirty ASID, this flushing is not needed and can
simply be avoided in the flushing code.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/mm/context.c')
0 files changed, 0 insertions, 0 deletions