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| author | Sibi Sankar <sibis@codeaurora.org> | 2020-08-01 18:00:48 +0530 |
|---|---|---|
| committer | Bjorn Andersson <bjorn.andersson@linaro.org> | 2020-09-15 23:44:18 +0000 |
| commit | a6d435c1a6aec3d86b2857204473176ac6eced1f (patch) | |
| tree | 88f5e4a97c9ac6ff40deddf3df0d1d41afc2fb82 /arch/arm64 | |
| parent | e7e41a207a3e37fe29a799fc0940b3a540237a49 (diff) | |
| download | linux-a6d435c1a6aec3d86b2857204473176ac6eced1f.tar.gz linux-a6d435c1a6aec3d86b2857204473176ac6eced1f.tar.bz2 linux-a6d435c1a6aec3d86b2857204473176ac6eced1f.zip | |
arm64: dts: qcom: sm8150: Add OSM L3 interconnect provider
Add Operation State Manager (OSM) L3 interconnect provider node on
SM8150 SoCs.
Acked-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200801123049.32398-7-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Diffstat (limited to 'arch/arm64')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sm8150.dtsi | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index 8f26df1651cd..f0a872e02686 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -11,6 +11,7 @@ #include <dt-bindings/clock/qcom,rpmh.h> #include <dt-bindings/clock/qcom,gcc-sm8150.h> #include <dt-bindings/clock/qcom,gpucc-sm8150.h> +#include <dt-bindings/interconnect/qcom,osm-l3.h> #include <dt-bindings/thermal/thermal.h> / { @@ -1183,6 +1184,16 @@ }; }; + osm_l3: interconnect@18321000 { + compatible = "qcom,sm8150-osm-l3"; + reg = <0 0x18321000 0 0x1400>; + + clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; + clock-names = "xo", "alternate"; + + #interconnect-cells = <1>; + }; + cpufreq_hw: cpufreq@18323000 { compatible = "qcom,cpufreq-hw"; reg = <0 0x18323000 0 0x1400>, <0 0x18325800 0 0x1400>, |