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| author | Suzuki K. Poulose <suzuki.poulose@arm.com> | 2015-10-19 14:24:48 +0100 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2015-10-21 15:35:57 +0100 |
| commit | c1e8656cbae139c8aaf34d7b802edecbc8a1cf58 (patch) | |
| tree | b016f4a78810859444547b4cea8177df15ad62bd /arch/arm64 | |
| parent | b3f1537893b54d0f42f52e0f4cde5e17e21f564c (diff) | |
| download | linux-c1e8656cbae139c8aaf34d7b802edecbc8a1cf58.tar.gz linux-c1e8656cbae139c8aaf34d7b802edecbc8a1cf58.tar.bz2 linux-c1e8656cbae139c8aaf34d7b802edecbc8a1cf58.zip | |
arm64: Cleanup mixed endian support detection
Make use of the system wide safe register to decide the support
for mixed endian.
Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com>
Tested-by: Dave Martin <Dave.Martin@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64')
| -rw-r--r-- | arch/arm64/include/asm/cpufeature.h | 12 | ||||
| -rw-r--r-- | arch/arm64/kernel/cpufeature.c | 22 |
2 files changed, 10 insertions, 24 deletions
diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h index 81217220eb92..1e281b27732b 100644 --- a/arch/arm64/include/asm/cpufeature.h +++ b/arch/arm64/include/asm/cpufeature.h @@ -141,11 +141,19 @@ void check_cpu_capabilities(const struct arm64_cpu_capabilities *caps, const char *info); void check_local_cpu_errata(void); void check_local_cpu_features(void); -bool cpu_supports_mixed_endian_el0(void); -bool system_supports_mixed_endian_el0(void); u64 read_system_reg(u32 id); +static inline bool cpu_supports_mixed_endian_el0(void) +{ + return id_aa64mmfr0_mixed_endian_el0(read_cpuid(ID_AA64MMFR0_EL1)); +} + +static inline bool system_supports_mixed_endian_el0(void) +{ + return id_aa64mmfr0_mixed_endian_el0(read_system_reg(SYS_ID_AA64MMFR0_EL1)); +} + #endif /* __ASSEMBLY__ */ #endif diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index b4656cabf87f..a90a64dd905a 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -26,7 +26,6 @@ #include <asm/processor.h> #include <asm/sysreg.h> -static bool mixed_endian_el0 = true; unsigned long elf_hwcap __read_mostly; EXPORT_SYMBOL_GPL(elf_hwcap); @@ -44,22 +43,6 @@ unsigned int compat_elf_hwcap2 __read_mostly; DECLARE_BITMAP(cpu_hwcaps, ARM64_NCAPS); - -bool cpu_supports_mixed_endian_el0(void) -{ - return id_aa64mmfr0_mixed_endian_el0(read_cpuid(ID_AA64MMFR0_EL1)); -} - -bool system_supports_mixed_endian_el0(void) -{ - return mixed_endian_el0; -} - -static void update_mixed_endian_el0_support(struct cpuinfo_arm64 *info) -{ - mixed_endian_el0 &= id_aa64mmfr0_mixed_endian_el0(info->reg_id_aa64mmfr0); -} - #define ARM64_FTR_BITS(STRICT, TYPE, SHIFT, WIDTH, SAFE_VAL) \ { \ .strict = STRICT, \ @@ -433,9 +416,6 @@ void __init init_cpu_features(struct cpuinfo_arm64 *info) init_cpu_ftr_reg(SYS_MVFR0_EL1, info->reg_mvfr0); init_cpu_ftr_reg(SYS_MVFR1_EL1, info->reg_mvfr1); init_cpu_ftr_reg(SYS_MVFR2_EL1, info->reg_mvfr2); - - /* This will be removed later, once we start using the infrastructure */ - update_mixed_endian_el0_support(info); } static void update_cpu_ftr_reg(struct arm64_ftr_reg *reg, u64 new) @@ -586,8 +566,6 @@ void update_cpu_features(int cpu, */ WARN_TAINT_ONCE(taint, TAINT_CPU_OUT_OF_SPEC, "Unsupported CPU feature variation.\n"); - - update_mixed_endian_el0_support(info); } u64 read_system_reg(u32 id) |