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| author | Michal Simek <michal.simek@xilinx.com> | 2020-08-24 10:28:45 +0200 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2020-09-29 13:00:19 +0200 |
| commit | db7691f9587cb01f4c9bde096f6e7ffd9f1297c0 (patch) | |
| tree | fbaa40760c60b6a97401935929876efaf90b5db8 /arch/arm64 | |
| parent | 35292518cb0a626fcdcabf739aed75060a018ab5 (diff) | |
| download | linux-db7691f9587cb01f4c9bde096f6e7ffd9f1297c0.tar.gz linux-db7691f9587cb01f4c9bde096f6e7ffd9f1297c0.tar.bz2 linux-db7691f9587cb01f4c9bde096f6e7ffd9f1297c0.zip | |
arm64: dts: zynqmp: Remove undocumented u-boot properties
u-boot, DT properties are not documented anywhere in Linux DT binding
that's why remove them.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/8ba339425b9c9f319bdedce7741367055a30713c.1598257720.git.michal.simek@xilinx.com
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Diffstat (limited to 'arch/arm64')
| -rw-r--r-- | arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi | 5 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 1 |
2 files changed, 0 insertions, 6 deletions
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi index 9868ca15dfc5..c94c3bb67edc 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi @@ -10,35 +10,30 @@ #include <dt-bindings/clock/xlnx-zynqmp-clk.h> / { pss_ref_clk: pss_ref_clk { - u-boot,dm-pre-reloc; compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <33333333>; }; video_clk: video_clk { - u-boot,dm-pre-reloc; compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <27000000>; }; pss_alt_ref_clk: pss_alt_ref_clk { - u-boot,dm-pre-reloc; compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <0>; }; gt_crx_ref_clk: gt_crx_ref_clk { - u-boot,dm-pre-reloc; compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <108000000>; }; aux_ref_clk: aux_ref_clk { - u-boot,dm-pre-reloc; compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <27000000>; diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index f1b338e09a67..771f60e0346d 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -131,7 +131,6 @@ }; zynqmp_clk: clock-controller { - u-boot,dm-pre-reloc; #clock-cells = <1>; compatible = "xlnx,zynqmp-clk"; clocks = <&pss_ref_clk>, |