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authorRitesh Harjani <riteshh@codeaurora.org>2016-11-21 12:07:14 +0530
committerAndy Gross <andy.gross@linaro.org>2016-11-23 11:16:50 -0600
commitdfce0738256e4cca93ad3a3069698a44c95489a6 (patch)
treecfa22bdb4e3e8673873dd281850bb7d2fcd6ad02 /arch/arm64
parent58432d74c9a7233bcfb23ef1108308dd17980e44 (diff)
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ARM: dts: Add xo to sdhc clock node on qcom platforms
Add xo entry to sdhc clock node on all qcom platforms. Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
Diffstat (limited to 'arch/arm64')
-rw-r--r--arch/arm64/boot/dts/qcom/msm8916.dtsi10
-rw-r--r--arch/arm64/boot/dts/qcom/msm8996.dtsi9
2 files changed, 11 insertions, 8 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 4221b7d2c0ce..1353f0e10f47 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -521,8 +521,9 @@
interrupts = <0 123 0>, <0 138 0>;
interrupt-names = "hc_irq", "pwr_irq";
clocks = <&gcc GCC_SDCC1_APPS_CLK>,
- <&gcc GCC_SDCC1_AHB_CLK>;
- clock-names = "core", "iface";
+ <&gcc GCC_SDCC1_AHB_CLK>,
+ <&xo_board>;
+ clock-names = "core", "iface", "xo";
bus-width = <8>;
non-removable;
status = "disabled";
@@ -536,8 +537,9 @@
interrupts = <0 125 0>, <0 221 0>;
interrupt-names = "hc_irq", "pwr_irq";
clocks = <&gcc GCC_SDCC2_APPS_CLK>,
- <&gcc GCC_SDCC2_AHB_CLK>;
- clock-names = "core", "iface";
+ <&gcc GCC_SDCC2_AHB_CLK>,
+ <&xo_board>;
+ clock-names = "core", "iface", "xo";
bus-width = <4>;
status = "disabled";
};
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index cde4114bae5a..9d1d7ad9b075 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -228,14 +228,14 @@
};
clocks {
- xo_board {
+ xo_board: xo_board {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <19200000>;
clock-output-names = "xo_board";
};
- sleep_clk {
+ sleep_clk: sleep_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32764>;
@@ -405,9 +405,10 @@
interrupts = <0 125 0>, <0 221 0>;
interrupt-names = "hc_irq", "pwr_irq";
- clock-names = "iface", "core";
+ clock-names = "iface", "core", "xo";
clocks = <&gcc GCC_SDCC2_AHB_CLK>,
- <&gcc GCC_SDCC2_APPS_CLK>;
+ <&gcc GCC_SDCC2_APPS_CLK>,
+ <&xo_board>;
bus-width = <4>;
};