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| author | Arnd Bergmann <arnd@arndb.de> | 2013-04-09 17:27:06 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2013-04-09 17:27:06 +0200 |
| commit | b94db2ac9e6aad2bdb51ae086b2806c2ceabd5b3 (patch) | |
| tree | a7ad5e0655b004ffcbceb620204a8c0e9a3dc080 /arch/arm | |
| parent | 0a01216c452d092b16c5a559cca339ad60193457 (diff) | |
| parent | 646dd2f0a980949b05042792fbadd72b735c3eda (diff) | |
| download | linux-b94db2ac9e6aad2bdb51ae086b2806c2ceabd5b3.tar.gz linux-b94db2ac9e6aad2bdb51ae086b2806c2ceabd5b3.tar.bz2 linux-b94db2ac9e6aad2bdb51ae086b2806c2ceabd5b3.zip | |
Merge tag 'samsung-fixes-for-v3.9' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes
From Kukjin Kim <kgene.kim@samsung.com>:
samsung fixes can support s3c24xx for v3.9
* tag 'samsung-fixes-for-v3.9' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: S3C24XX: Fix interrupt pending register offset of the EINT controller
ARM: S3C24XX: Correct NR_IRQS definition for s3c2440
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mach-s3c24xx/include/mach/irqs.h | 4 | ||||
| -rw-r--r-- | arch/arm/mach-s3c24xx/irq.c | 2 |
2 files changed, 2 insertions, 4 deletions
diff --git a/arch/arm/mach-s3c24xx/include/mach/irqs.h b/arch/arm/mach-s3c24xx/include/mach/irqs.h index b7a9f4d469e8..1e73f5fa8659 100644 --- a/arch/arm/mach-s3c24xx/include/mach/irqs.h +++ b/arch/arm/mach-s3c24xx/include/mach/irqs.h @@ -188,10 +188,8 @@ #if defined(CONFIG_CPU_S3C2416) #define NR_IRQS (IRQ_S3C2416_I2S1 + 1) -#elif defined(CONFIG_CPU_S3C2443) -#define NR_IRQS (IRQ_S3C2443_AC97+1) #else -#define NR_IRQS (IRQ_S3C2440_AC97+1) +#define NR_IRQS (IRQ_S3C2443_AC97 + 1) #endif /* compatibility define. */ diff --git a/arch/arm/mach-s3c24xx/irq.c b/arch/arm/mach-s3c24xx/irq.c index cb9f5e011e73..d8ba9bee4c7e 100644 --- a/arch/arm/mach-s3c24xx/irq.c +++ b/arch/arm/mach-s3c24xx/irq.c @@ -500,7 +500,7 @@ struct s3c_irq_intc *s3c24xx_init_intc(struct device_node *np, base = (void *)0xfd000000; intc->reg_mask = base + 0xa4; - intc->reg_pending = base + 0x08; + intc->reg_pending = base + 0xa8; irq_num = 20; irq_start = S3C2410_IRQ(32); irq_offset = 4; |