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| author | Dinh Nguyen <dinguyen@opensource.altera.com> | 2014-10-22 13:00:42 -0500 |
|---|---|---|
| committer | Dinh Nguyen <dinguyen@opensource.altera.com> | 2014-10-22 20:59:07 -0500 |
| commit | d11ac1d2d556ca8495e06d7c00fe5a96e4934e98 (patch) | |
| tree | 77f6c22268c7ced51c6d72fd8626c4d683f0319d /arch/arm | |
| parent | 3a4356c0c042a5f340c8d6ee1a4feaa1c8e51ea2 (diff) | |
| download | linux-d11ac1d2d556ca8495e06d7c00fe5a96e4934e98.tar.gz linux-d11ac1d2d556ca8495e06d7c00fe5a96e4934e98.tar.bz2 linux-d11ac1d2d556ca8495e06d7c00fe5a96e4934e98.zip | |
ARM: dts: socfpga: rename gpio nodes
Since the Synopsys GPIO IP can support multiple ports of varying widths, it
would make more sense to have the GPIO node DTS entry as this:
gpio0: gpio@ff708000{
porta{
};
};
Also, this is documented in the snps-dwapb-gpio.txt.
Suggested-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/socfpga.dtsi | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi index 45fce2cf6fed..4472fd92685c 100644 --- a/arch/arm/boot/dts/socfpga.dtsi +++ b/arch/arm/boot/dts/socfpga.dtsi @@ -547,7 +547,7 @@ status = "disabled"; }; - gpio@ff708000 { + gpio0: gpio@ff708000 { #address-cells = <1>; #size-cells = <0>; compatible = "snps,dw-apb-gpio"; @@ -555,7 +555,7 @@ clocks = <&per_base_clk>; status = "disabled"; - gpio0: gpio-controller@0 { + porta: gpio-controller@0 { compatible = "snps,dw-apb-gpio-port"; gpio-controller; #gpio-cells = <2>; @@ -567,7 +567,7 @@ }; }; - gpio@ff709000 { + gpio1: gpio@ff709000 { #address-cells = <1>; #size-cells = <0>; compatible = "snps,dw-apb-gpio"; @@ -575,7 +575,7 @@ clocks = <&per_base_clk>; status = "disabled"; - gpio1: gpio-controller@0 { + portb: gpio-controller@0 { compatible = "snps,dw-apb-gpio-port"; gpio-controller; #gpio-cells = <2>; @@ -587,7 +587,7 @@ }; }; - gpio@ff70a000 { + gpio2: gpio@ff70a000 { #address-cells = <1>; #size-cells = <0>; compatible = "snps,dw-apb-gpio"; @@ -595,7 +595,7 @@ clocks = <&per_base_clk>; status = "disabled"; - gpio2: gpio-controller@0 { + portc: gpio-controller@0 { compatible = "snps,dw-apb-gpio-port"; gpio-controller; #gpio-cells = <2>; |