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author | Mike Frysinger <vapier@gentoo.org> | 2010-10-27 16:32:24 -0400 |
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committer | Mike Frysinger <vapier@gentoo.org> | 2011-01-10 07:18:16 -0500 |
commit | ec5109e7ca086359c46fe5351121d0e125a2879b (patch) | |
tree | 59408b2f26ed2532fb7edbebfa8200343529677f /arch/blackfin | |
parent | 10cdc1a78a02bb1d76b28b146083cb060399d86f (diff) | |
download | linux-ec5109e7ca086359c46fe5351121d0e125a2879b.tar.gz linux-ec5109e7ca086359c46fe5351121d0e125a2879b.tar.bz2 linux-ec5109e7ca086359c46fe5351121d0e125a2879b.zip |
Blackfin: bf561: SMP: add multicore pll handlers
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin')
-rw-r--r-- | arch/blackfin/mach-bf561/include/mach/pll.h | 53 |
1 files changed, 53 insertions, 0 deletions
diff --git a/arch/blackfin/mach-bf561/include/mach/pll.h b/arch/blackfin/mach-bf561/include/mach/pll.h index 94cca674d835..7977db2f1c12 100644 --- a/arch/blackfin/mach-bf561/include/mach/pll.h +++ b/arch/blackfin/mach-bf561/include/mach/pll.h @@ -1 +1,54 @@ +/* + * Copyright 2005-2010 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#ifndef _MACH_PLL_H +#define _MACH_PLL_H + +#ifndef __ASSEMBLY__ + +#ifdef CONFIG_SMP + +#include <asm/blackfin.h> +#include <asm/irqflags.h> +#include <mach/irq.h> + +#define SUPPLE_0_WAKEUP ((IRQ_SUPPLE_0 - (IRQ_CORETMR + 1)) % 32) + +static inline void +bfin_iwr_restore(unsigned long iwr0, unsigned long iwr1, unsigned long iwr2) +{ + unsigned long SICA_SICB_OFF = ((bfin_read_DSPID() & 0xff) ? 0x1000 : 0); + + bfin_write32(SIC_IWR0 + SICA_SICB_OFF, iwr0); + bfin_write32(SIC_IWR1 + SICA_SICB_OFF, iwr1); +} +#define bfin_iwr_restore bfin_iwr_restore + +static inline void +bfin_iwr_save(unsigned long niwr0, unsigned long niwr1, unsigned long niwr2, + unsigned long *iwr0, unsigned long *iwr1, unsigned long *iwr2) +{ + unsigned long SICA_SICB_OFF = ((bfin_read_DSPID() & 0xff) ? 0x1000 : 0); + + *iwr0 = bfin_read32(SIC_IWR0 + SICA_SICB_OFF); + *iwr1 = bfin_read32(SIC_IWR1 + SICA_SICB_OFF); + bfin_iwr_restore(niwr0, niwr1, niwr2); +} +#define bfin_iwr_save bfin_iwr_save + +static inline void +bfin_iwr_set_sup0(unsigned long *iwr0, unsigned long *iwr1, unsigned long *iwr2) +{ + bfin_iwr_save(0, IWR_ENABLE(SUPPLE_0_WAKEUP), 0, iwr0, iwr1, iwr2); +} + +#endif + +#endif + #include <mach-common/pll.h> + +#endif |