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author | Christoph Hellwig <hch@lst.de> | 2021-06-23 16:11:21 +0200 |
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committer | Christoph Hellwig <hch@lst.de> | 2021-08-19 09:02:40 +0200 |
commit | c1dec343d7abdf8e71aab2a289ab45ce8b1afb7e (patch) | |
tree | df26940c70142940ade048b0a2d80bd0bf457aa4 /arch/hexagon | |
parent | 22f9feb49950885cdb6e37513f134d154175e743 (diff) | |
download | linux-c1dec343d7abdf8e71aab2a289ab45ce8b1afb7e.tar.gz linux-c1dec343d7abdf8e71aab2a289ab45ce8b1afb7e.tar.bz2 linux-c1dec343d7abdf8e71aab2a289ab45ce8b1afb7e.zip |
hexagon: use the generic global coherent pool
Switch hexagon to use the generic code for dma_alloc_coherent from
a global pre-filled pool.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Brian Cain <bcain@codeaurora.org>
Diffstat (limited to 'arch/hexagon')
-rw-r--r-- | arch/hexagon/Kconfig | 1 | ||||
-rw-r--r-- | arch/hexagon/kernel/dma.c | 57 |
2 files changed, 12 insertions, 46 deletions
diff --git a/arch/hexagon/Kconfig b/arch/hexagon/Kconfig index e5a852080730..aab1a40eb653 100644 --- a/arch/hexagon/Kconfig +++ b/arch/hexagon/Kconfig @@ -7,6 +7,7 @@ config HEXAGON select ARCH_32BIT_OFF_T select ARCH_HAS_SYNC_DMA_FOR_DEVICE select ARCH_NO_PREEMPT + select DMA_GLOBAL_POOL # Other pending projects/to-do items. # select HAVE_REGS_AND_STACK_ACCESS_API # select HAVE_HW_BREAKPOINT if PERF_EVENTS diff --git a/arch/hexagon/kernel/dma.c b/arch/hexagon/kernel/dma.c index 00b9a81075dd..882680e81a30 100644 --- a/arch/hexagon/kernel/dma.c +++ b/arch/hexagon/kernel/dma.c @@ -7,54 +7,8 @@ #include <linux/dma-map-ops.h> #include <linux/memblock.h> -#include <linux/genalloc.h> -#include <linux/module.h> #include <asm/page.h> -static struct gen_pool *coherent_pool; - - -/* Allocates from a pool of uncached memory that was reserved at boot time */ - -void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_addr, - gfp_t flag, unsigned long attrs) -{ - void *ret; - - /* - * Our max_low_pfn should have been backed off by 16MB in - * mm/init.c to create DMA coherent space. Use that as the VA - * for the pool. - */ - - if (coherent_pool == NULL) { - coherent_pool = gen_pool_create(PAGE_SHIFT, -1); - - if (coherent_pool == NULL) - panic("Can't create %s() memory pool!", __func__); - else - gen_pool_add(coherent_pool, - (unsigned long)pfn_to_virt(max_low_pfn), - hexagon_coherent_pool_size, -1); - } - - ret = (void *) gen_pool_alloc(coherent_pool, size); - - if (ret) { - memset(ret, 0, size); - *dma_addr = (dma_addr_t) virt_to_phys(ret); - } else - *dma_addr = ~0; - - return ret; -} - -void arch_dma_free(struct device *dev, size_t size, void *vaddr, - dma_addr_t dma_addr, unsigned long attrs) -{ - gen_pool_free(coherent_pool, (unsigned long) vaddr, size); -} - void arch_sync_dma_for_device(phys_addr_t paddr, size_t size, enum dma_data_direction dir) { @@ -77,3 +31,14 @@ void arch_sync_dma_for_device(phys_addr_t paddr, size_t size, BUG(); } } + +/* + * Our max_low_pfn should have been backed off by 16MB in mm/init.c to create + * DMA coherent space. Use that for the pool. + */ +static int __init hexagon_dma_init(void) +{ + return dma_init_global_coherent(PFN_PHYS(max_low_pfn), + hexagon_coherent_pool_size); +} +core_initcall(hexagon_dma_init); |