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| author | WANG Xuerui <git@xen0n.name> | 2023-05-01 17:19:27 +0800 |
|---|---|---|
| committer | Huacai Chen <chenhuacai@loongson.cn> | 2023-05-01 17:19:27 +0800 |
| commit | 325a38b511caff53c10393bab1e59cbd37f15ec2 (patch) | |
| tree | 041da1bd1b28c90fa9ac56a9196fd1f2ae9fec7f /arch/loongarch | |
| parent | 98b90ede59472de5931b7e4d72c3ff948eaa19a4 (diff) | |
| download | linux-325a38b511caff53c10393bab1e59cbd37f15ec2.tar.gz linux-325a38b511caff53c10393bab1e59cbd37f15ec2.tar.bz2 linux-325a38b511caff53c10393bab1e59cbd37f15ec2.zip | |
LoongArch: Tweak the BADV and CPUCFG.PRID lines in show_regs()
Use ISA manual names for BADV and CPUCFG.PRID lines in show_regs(), for
stylistic consistency with the other lines already touched.
While at it, also include current CPU's full name in show_regs() output.
It may be more helpful for developers looking at the resulting dumps,
because multiple distinct CPU models may share the same PRID. Not having
this info available may hide problems only found on some but not all of
the models sharing one specific PRID.
Signed-off-by: WANG Xuerui <git@xen0n.name>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
Diffstat (limited to 'arch/loongarch')
| -rw-r--r-- | arch/loongarch/kernel/traps.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/loongarch/kernel/traps.c b/arch/loongarch/kernel/traps.c index 748fe2f9aed0..569c3a5bb052 100644 --- a/arch/loongarch/kernel/traps.c +++ b/arch/loongarch/kernel/traps.c @@ -354,10 +354,10 @@ static void __show_regs(const struct pt_regs *regs) print_estat(regs->csr_estat); if (exccode >= EXCCODE_TLBL && exccode <= EXCCODE_ALE) - printk("BadVA : %0*lx\n", field, regs->csr_badvaddr); + printk(" BADV: %0*lx\n", field, regs->csr_badvaddr); - printk("PrId : %08x (%s)\n", read_cpucfg(LOONGARCH_CPUCFG0), - cpu_family_string()); + printk(" PRID: %08x (%s, %s)\n", read_cpucfg(LOONGARCH_CPUCFG0), + cpu_family_string(), cpu_full_name_string()); } void show_regs(struct pt_regs *regs) |