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| author | Steven King <sfking@fdwdc.com> | 2014-06-30 09:53:19 -0700 |
|---|---|---|
| committer | Greg Ungerer <gerg@linux-m68k.org> | 2016-12-05 08:53:27 +1000 |
| commit | 2d24b532f95b8b1b61bf670ef5bdee52bcf59640 (patch) | |
| tree | 9da27a342282f64f0929016fa984fd54a4b48eea /arch/m68k/coldfire/m527x.c | |
| parent | 3e5de27e940d00d8d504dfb96625fb654f641509 (diff) | |
| download | linux-2d24b532f95b8b1b61bf670ef5bdee52bcf59640.tar.gz linux-2d24b532f95b8b1b61bf670ef5bdee52bcf59640.tar.bz2 linux-2d24b532f95b8b1b61bf670ef5bdee52bcf59640.zip | |
m68knommu: platform support for i2c devices on ColdFire SoC
These changes based on work by Steven King <sfking@fdwdc.com> to support
the i2c hardware modules on ColdFire SoC family devices.
This is the per SoC hardware support. Contains a common platform device
setup. Each of the SoC family members tends to have some minor local
setup required to initialize the module. But all ColdFire family members
use the same i2c hardware module.
This i2c hardware module is the same as used in the Freescale iMX ARM
based family of SoC devices. Steven's original patches were based on using
a new and different i2c-coldfire.c driver. But this is not neccessary as
we can use the existing Linux i2c-imx.c driver with no change required to
it. And this patch is now based on using the existing i2c-imx driver.
This patch only contains the ColdFire platform changes.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Tested-by: Angelo Dureghello <angelo@sysam.it>
Diffstat (limited to 'arch/m68k/coldfire/m527x.c')
| -rw-r--r-- | arch/m68k/coldfire/m527x.c | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/m68k/coldfire/m527x.c b/arch/m68k/coldfire/m527x.c index c0b3e28f91df..b10b436b5a31 100644 --- a/arch/m68k/coldfire/m527x.c +++ b/arch/m68k/coldfire/m527x.c @@ -36,6 +36,7 @@ DEFINE_CLK(mcfuart2, "mcfuart.2", MCF_BUSCLK); DEFINE_CLK(mcfqspi0, "mcfqspi.0", MCF_BUSCLK); DEFINE_CLK(fec0, "fec.0", MCF_BUSCLK); DEFINE_CLK(fec1, "fec.1", MCF_BUSCLK); +DEFINE_CLK(mcfi2c0, "imx1-i2c.0", MCF_BUSCLK); struct clk *mcf_clks[] = { &clk_pll, @@ -50,6 +51,7 @@ struct clk *mcf_clks[] = { &clk_mcfqspi0, &clk_fec0, &clk_fec1, + &clk_mcfi2c0, NULL }; @@ -76,6 +78,31 @@ static void __init m527x_qspi_init(void) /***************************************************************************/ +static void __init m527x_i2c_init(void) +{ +#if IS_ENABLED(CONFIG_I2C_IMX) +#if defined(CONFIG_M5271) + u8 par; + + /* setup Port FECI2C Pin Assignment Register for I2C */ + /* set PAR_SCL to SCL and PAR_SDA to SDA */ + par = readb(MCFGPIO_PAR_FECI2C); + par |= 0x0f; + writeb(par, MCFGPIO_PAR_FECI2C); +#elif defined(CONFIG_M5275) + u16 par; + + /* setup Port FECI2C Pin Assignment Register for I2C */ + /* set PAR_SCL to SCL and PAR_SDA to SDA */ + par = readw(MCFGPIO_PAR_FECI2C); + par |= 0x0f; + writew(par, MCFGPIO_PAR_FECI2C); +#endif +#endif /* IS_ENABLED(CONFIG_I2C_IMX) */ +} + +/***************************************************************************/ + static void __init m527x_uarts_init(void) { u16 sepmask; @@ -122,6 +149,7 @@ void __init config_BSP(char *commandp, int size) m527x_uarts_init(); m527x_fec_init(); m527x_qspi_init(); + m527x_i2c_init(); } /***************************************************************************/ |