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authorDavid Hildenbrand <david@redhat.com>2023-04-04 10:56:36 +0200
committerAndrew Morton <akpm@linux-foundation.org>2023-04-18 16:29:53 -0700
commit9bc47f11525fb666a370063888904160188b024e (patch)
tree3bace58c20c35960f28996ff05bb96479c5e5618 /arch/m68k/include/asm
parent92d5df38ca91f138d4964d71a6835add95f99e59 (diff)
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m68k/mm: use correct bit number in _PAGE_SWP_EXCLUSIVE comment
As noticed by Geert, commit b5c88f21531c ("microblaze/mm: support __HAVE_ARCH_PTE_SWP_EXCLUSIVE") modified m68k code by accident. While replacing 0x080 by CF_PAGE_NOCACHE is correct, although it should have been part of commit ed4154067a08 ("m68k/mm: support __HAVE_ARCH_PTE_SWP_EXCLUSIVE"), replacing "bit 7" by "bit 24" in the comment was wrong. Let's revert to the previous, correct, comment. Link: https://lkml.kernel.org/r/20230404085636.121409-1-david@redhat.com Signed-off-by: David Hildenbrand <david@redhat.com> Reported-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Diffstat (limited to 'arch/m68k/include/asm')
-rw-r--r--arch/m68k/include/asm/mcf_pgtable.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/m68k/include/asm/mcf_pgtable.h b/arch/m68k/include/asm/mcf_pgtable.h
index 13741c1245e1..d97fbb812f63 100644
--- a/arch/m68k/include/asm/mcf_pgtable.h
+++ b/arch/m68k/include/asm/mcf_pgtable.h
@@ -46,7 +46,7 @@
#define _CACHEMASK040 (~0x060)
#define _PAGE_GLOBAL040 0x400 /* 68040 global bit, used for kva descs */
-/* We borrow bit 24 to store the exclusive marker in swap PTEs. */
+/* We borrow bit 7 to store the exclusive marker in swap PTEs. */
#define _PAGE_SWP_EXCLUSIVE CF_PAGE_NOCACHE
/*