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authorKees Cook <keescook@chromium.org>2022-02-02 14:48:34 -0800
committerKees Cook <keescook@chromium.org>2022-02-13 16:48:04 -0800
commit2a55550fbba643f41318bb12ab20e6510c7df231 (patch)
treee94c670ef14997f33b3dbfa82d3b0c29b6eab5cf /arch/m68k
parent9ed0a59c0cbb663ea09588322498499a937d08fa (diff)
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m68k: cmpxchg: Dereference matching size
Similar to the recent arm64 fix[1], avoid overly wide casts in the m68k cmpxchg implementation. Avoids this warning under -Warray-bounds with GCC 11: net/sched/cls_tcindex.c: In function 'tcindex_set_parms': ./arch/m68k/include/asm/cmpxchg.h:64:17: warning: array subscript 'volatile struct __xchg_dummy[0]' is partly outside array bounds of 'struct tcf_result[1]' [-Warray-bounds] 64 | __asm__ __volatile__ | ^~~~~~~ net/sched/cls_tcindex.c:338:27: note: while referencing 'cr' 338 | struct tcf_result cr = {}; | ^~ No binary output difference are seen from this change. [1] commit 3364c6ce23c6 ("arm64: atomics: lse: Dereference matching size") Cc: "Peter Zijlstra (Intel)" <peterz@infradead.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Greg Ungerer <gerg@linux-m68k.org> Cc: linux-m68k@lists.linux-m68k.org Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Link: https://lore.kernel.org/lkml/CAMuHMdVRrD+2zKoHxAaQdDuiK5JFDanbv0SJ91OdWfx+eyekPQ@mail.gmail.com Signed-off-by: Kees Cook <keescook@chromium.org>
Diffstat (limited to 'arch/m68k')
-rw-r--r--arch/m68k/include/asm/cmpxchg.h9
1 files changed, 4 insertions, 5 deletions
diff --git a/arch/m68k/include/asm/cmpxchg.h b/arch/m68k/include/asm/cmpxchg.h
index e8ca4b0ccefa..6cf464cdab06 100644
--- a/arch/m68k/include/asm/cmpxchg.h
+++ b/arch/m68k/include/asm/cmpxchg.h
@@ -4,8 +4,7 @@
#include <linux/irqflags.h>
-struct __xchg_dummy { unsigned long a[100]; };
-#define __xg(x) ((volatile struct __xchg_dummy *)(x))
+#define __xg(type, x) ((volatile type *)(x))
extern unsigned long __invalid_xchg_size(unsigned long, volatile void *, int);
@@ -50,7 +49,7 @@ static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int siz
"1:\n\t"
"casb %0,%1,%2\n\t"
"jne 1b"
- : "=&d" (x) : "d" (x), "m" (*__xg(ptr)) : "memory");
+ : "=&d" (x) : "d" (x), "m" (*__xg(u8, ptr)) : "memory");
break;
case 2:
__asm__ __volatile__
@@ -58,7 +57,7 @@ static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int siz
"1:\n\t"
"casw %0,%1,%2\n\t"
"jne 1b"
- : "=&d" (x) : "d" (x), "m" (*__xg(ptr)) : "memory");
+ : "=&d" (x) : "d" (x), "m" (*__xg(u16, ptr)) : "memory");
break;
case 4:
__asm__ __volatile__
@@ -66,7 +65,7 @@ static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int siz
"1:\n\t"
"casl %0,%1,%2\n\t"
"jne 1b"
- : "=&d" (x) : "d" (x), "m" (*__xg(ptr)) : "memory");
+ : "=&d" (x) : "d" (x), "m" (*__xg(u32, ptr)) : "memory");
break;
default:
x = __invalid_xchg_size(x, ptr, size);