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authorManuel Lauss <manuel.lauss@gmail.com>2014-07-23 16:36:24 +0200
committerRalf Baechle <ralf@linux-mips.org>2014-07-30 13:53:28 +0200
commit1d09de7dc76ef96a9a2c7c0244e20f12d68e6ef8 (patch)
tree929cb54b63224fc65d7b56d52b00a89bb236b9a0 /arch/mips/alchemy/board-xxs1500.c
parent2ef1bb99116e49226e8bab8ebab255f12fa8a99e (diff)
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MIPS: Alchemy: introduce helpers to access SYS register block.
This patch changes all absolute SYS_XY registers to offsets from the SYS block base, prefixes them with AU1000 to avoid silent failures due to changed addresses, and introduces helper functions to read/write them. No functional changes, comparing assembly of a few select functions shows no differences. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/7464/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/alchemy/board-xxs1500.c')
-rw-r--r--arch/mips/alchemy/board-xxs1500.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/alchemy/board-xxs1500.c b/arch/mips/alchemy/board-xxs1500.c
index 3fb814be0e91..0fc53e08a894 100644
--- a/arch/mips/alchemy/board-xxs1500.c
+++ b/arch/mips/alchemy/board-xxs1500.c
@@ -87,9 +87,9 @@ void __init board_setup(void)
alchemy_gpio2_enable();
/* Set multiple use pins (UART3/GPIO) to UART (it's used as UART too) */
- pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_UR3;
+ pin_func = alchemy_rdsys(AU1000_SYS_PINFUNC) & ~SYS_PF_UR3;
pin_func |= SYS_PF_UR3;
- au_writel(pin_func, SYS_PINFUNC);
+ alchemy_wrsys(pin_func, AU1000_SYS_PINFUNC);
/* Enable UART */
alchemy_uart_enable(AU1000_UART3_PHYS_ADDR);