summaryrefslogtreecommitdiffstats
path: root/arch/mips/cavium-octeon/csrc-octeon.c
diff options
context:
space:
mode:
authorDavid Daney <david.daney@cavium.com>2016-02-09 11:00:10 -0800
committerRalf Baechle <ralf@linux-mips.org>2016-05-13 14:01:40 +0200
commit9bc22239956e3877d085b843bfe89ab2a98ab50a (patch)
treeb026f41e4de06723a03161a8a2e234e0346311d5 /arch/mips/cavium-octeon/csrc-octeon.c
parent182a6d1cd393226350ec22d973d2139adb194daa (diff)
downloadlinux-9bc22239956e3877d085b843bfe89ab2a98ab50a.tar.gz
linux-9bc22239956e3877d085b843bfe89ab2a98ab50a.tar.bz2
linux-9bc22239956e3877d085b843bfe89ab2a98ab50a.zip
MIPS: OCTEON: Don't attempt to use nonexistent registers on OCTEON III models.
Attempts to read the nonexistent registers results in bus errors. Either use registers that exist, or don't do the access as appropriate. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/12502/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/cavium-octeon/csrc-octeon.c')
-rw-r--r--arch/mips/cavium-octeon/csrc-octeon.c13
1 files changed, 9 insertions, 4 deletions
diff --git a/arch/mips/cavium-octeon/csrc-octeon.c b/arch/mips/cavium-octeon/csrc-octeon.c
index 1882e6475dd0..23c2344a3552 100644
--- a/arch/mips/cavium-octeon/csrc-octeon.c
+++ b/arch/mips/cavium-octeon/csrc-octeon.c
@@ -19,6 +19,7 @@
#include <asm/octeon/cvmx-ipd-defs.h>
#include <asm/octeon/cvmx-mio-defs.h>
#include <asm/octeon/cvmx-rst-defs.h>
+#include <asm/octeon/cvmx-fpa-defs.h>
static u64 f;
static u64 rdiv;
@@ -65,9 +66,13 @@ void __init octeon_setup_delays(void)
*/
void octeon_init_cvmcount(void)
{
+ u64 clk_reg;
unsigned long flags;
unsigned loops = 2;
+ clk_reg = octeon_has_feature(OCTEON_FEATURE_FPA3) ?
+ CVMX_FPA_CLK_COUNT : CVMX_IPD_CLK_COUNT;
+
/* Clobber loops so GCC will not unroll the following while loop. */
asm("" : "+r" (loops));
@@ -77,18 +82,18 @@ void octeon_init_cvmcount(void)
* which should give more deterministic timing.
*/
while (loops--) {
- u64 ipd_clk_count = cvmx_read_csr(CVMX_IPD_CLK_COUNT);
+ u64 clk_count = cvmx_read_csr(clk_reg);
if (rdiv != 0) {
- ipd_clk_count *= rdiv;
+ clk_count *= rdiv;
if (f != 0) {
asm("dmultu\t%[cnt],%[f]\n\t"
"mfhi\t%[cnt]"
- : [cnt] "+r" (ipd_clk_count)
+ : [cnt] "+r" (clk_count)
: [f] "r" (f)
: "hi", "lo");
}
}
- write_c0_cvmcount(ipd_clk_count);
+ write_c0_cvmcount(clk_count);
}
local_irq_restore(flags);
}