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| author | Paul Burton <paul.burton@imgtec.com> | 2016-02-03 16:17:28 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2016-05-13 14:01:53 +0200 |
| commit | df8b1a5ee9f7f5fbb5e8f0df9537c648481019ea (patch) | |
| tree | 075ee12695e3b94f2156a9ed4bbbf3faca2cf6e2 /arch/mips/include/asm/cpu.h | |
| parent | eba20a3a37ff9fe8a4ae99f108ee4ce52db61247 (diff) | |
| download | linux-df8b1a5ee9f7f5fbb5e8f0df9537c648481019ea.tar.gz linux-df8b1a5ee9f7f5fbb5e8f0df9537c648481019ea.tar.bz2 linux-df8b1a5ee9f7f5fbb5e8f0df9537c648481019ea.zip | |
MIPS: Add M6250 PRID & cpu_type_enum values
Define the processor ID for the M6250 CPU and add a value to the enum
cpu_type_enum for the core.
[ralf@linux-mips.org: Fix merge conflict.]
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Joshua Kinard <kumba@gentoo.org>
Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12373/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/cpu.h')
| -rw-r--r-- | arch/mips/include/asm/cpu.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h index 7773b8e0de1e..a7a91857950c 100644 --- a/arch/mips/include/asm/cpu.h +++ b/arch/mips/include/asm/cpu.h @@ -122,6 +122,7 @@ #define PRID_IMP_M5150 0xa700 #define PRID_IMP_P5600 0xa800 #define PRID_IMP_I6400 0xa900 +#define PRID_IMP_M6250 0xab00 /* * These are the PRID's for when 23:16 == PRID_COMP_SIBYTE @@ -311,7 +312,7 @@ enum cpu_type_enum { CPU_ALCHEMY, CPU_PR4450, CPU_BMIPS32, CPU_BMIPS3300, CPU_BMIPS4350, CPU_BMIPS4380, CPU_BMIPS5000, CPU_JZRISC, CPU_LOONGSON1, CPU_M14KC, CPU_M14KEC, CPU_INTERAPTIV, CPU_P5600, CPU_PROAPTIV, CPU_1074K, - CPU_M5150, CPU_I6400, CPU_P6600, + CPU_M5150, CPU_I6400, CPU_P6600, CPU_M6250, /* * MIPS64 class processors |