summaryrefslogtreecommitdiffstats
path: root/arch/mips/jz4740
diff options
context:
space:
mode:
authorPaul Burton <paul.burton@imgtec.com>2015-05-24 16:11:21 +0100
committerRalf Baechle <ralf@linux-mips.org>2015-06-21 21:52:58 +0200
commitadbdce77ccc345e6ae86f6887212af13983a626e (patch)
treeb4fbb78c1e1dfd8683a9b57451dd087caac9044b /arch/mips/jz4740
parent5f408ebfd2f3fa791449c0d641254f795747c081 (diff)
downloadlinux-adbdce77ccc345e6ae86f6887212af13983a626e.tar.gz
linux-adbdce77ccc345e6ae86f6887212af13983a626e.tar.bz2
linux-adbdce77ccc345e6ae86f6887212af13983a626e.zip
MIPS: JZ4740: probe interrupt controller via DT
Declare the JZ4740 interrupt controller for probe via DT using the standard irqchip_init function, and make use of that function to probe the controller by adding the appropriate node to the JZ4740 dtsi. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Kumar Gala <galak@codeaurora.org> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: devicetree@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: Brian Norris <computersforpeace@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/10135/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/jz4740')
-rw-r--r--arch/mips/jz4740/irq.c8
-rw-r--r--arch/mips/jz4740/setup.c2
2 files changed, 7 insertions, 3 deletions
diff --git a/arch/mips/jz4740/irq.c b/arch/mips/jz4740/irq.c
index bac1f52d327f..43e000aa8a2e 100644
--- a/arch/mips/jz4740/irq.c
+++ b/arch/mips/jz4740/irq.c
@@ -18,6 +18,7 @@
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
+#include <linux/of_irq.h>
#include <linux/timex.h>
#include <linux/slab.h>
#include <linux/delay.h>
@@ -32,6 +33,8 @@
#include "irq.h"
+#include "../../drivers/irqchip/irqchip.h"
+
static void __iomem *jz_intc_base;
#define JZ_REG_INTC_STATUS 0x00
@@ -77,7 +80,8 @@ static struct irqaction jz4740_cascade_action = {
.name = "JZ4740 cascade interrupt",
};
-void __init jz4740_intc_init(void)
+static int __init jz4740_intc_of_init(struct device_node *node,
+ struct device_node *parent)
{
struct irq_chip_generic *gc;
struct irq_chip_type *ct;
@@ -105,7 +109,9 @@ void __init jz4740_intc_init(void)
irq_setup_generic_chip(gc, IRQ_MSK(32), 0, 0, IRQ_NOPROBE | IRQ_LEVEL);
setup_irq(2, &jz4740_cascade_action);
+ return 0;
}
+IRQCHIP_DECLARE(jz4740_intc, "ingenic,jz4740-intc", jz4740_intc_of_init);
#ifdef CONFIG_DEBUG_FS
diff --git a/arch/mips/jz4740/setup.c b/arch/mips/jz4740/setup.c
index 480873031007..8c08d7dcda66 100644
--- a/arch/mips/jz4740/setup.c
+++ b/arch/mips/jz4740/setup.c
@@ -25,7 +25,6 @@
#include <asm/prom.h>
#include <asm/mach-jz4740/base.h>
-#include <asm/mach-jz4740/irq.h>
#include "reset.h"
@@ -84,5 +83,4 @@ const char *get_system_type(void)
void __init arch_init_irq(void)
{
irqchip_init();
- jz4740_intc_init();
}